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*: aligned generics, fixed altivec, aligned tests...
author Paper <paper@tflc.us>
date Wed, 23 Oct 2024 10:13:25 -0400
parents f12b5dd4e18c
children e05c257c6a23
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1 vec - a tiny SIMD vector header-only library written in C99
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2
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3 it comes with an extremely basic (and somewhat lacking) API,
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4 where there are eight supported vector types, all 128-bit:
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5
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6 vint8x16 - 16 signed 8-bit integers
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7 vint16x8 - 8 signed 16-bit integers
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8 vint32x4 - 4 signed 32-bit integers
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9 vint64x2 - 2 signed 64-bit integers
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10 vuint8x16 - 16 unsigned 8-bit integers
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11 vuint16x8 - 8 unsigned 16-bit integers
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12 vuint32x4 - 4 unsigned 32-bit integers
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13 vuint32x4 - 2 unsigned 64-bit integers
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14
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15 all of these have many operations that are prefixed with the
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16 name of the type and an underscore, for example:
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17
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18 vint8x16 vint8x16_splat(uint8_t x)
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19 - creates a vint8x16 where all of the values are filled
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20 with the value of `x'
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21
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22 the current supported operations are:
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23
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24 v[u]intAxB splat([u]intA_t x)
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25 creates a vector with all of the values are filled with
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26 the value of `x'
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27
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28 v[u]intAxB load(const [u]intA_t x[B])
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29 copies the values from the memory address stored at `x';
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30 the address is NOT required to be aligned
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31
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32 void store(v[u]intAxB vec, [u]intA_t x[B])
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33 copies the values from the vector into the memory address
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34 stored at `x'
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35
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36 like with load(), this does not require address alignment
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37
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38 v[u]intAxB add(v[u]intAxB vec1, v[u]intAxB vec2)
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39 adds the value of `vec1' and `vec2' and returns it
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40
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41 v[u]intAxB sub(v[u]intAxB vec1, v[u]intAxB vec2)
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42 subtracts the value of `vec2' from `vec1' and returns it
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43
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44 v[u]intAxB mul(v[u]intAxB vec1, v[u]intAxB vec2)
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45 multiplies the values of `vec1' and `vec2' together and
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46 returns it
2
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47
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48 v[u]intAxB div(v[u]intAxB vec1, v[u]intAxB vec2)
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49 divides vec1 by the values in vec2. dividing by zero is
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50 considered defined behavior and should result in a zero;
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51 if this doesn't happen it's considered a bug
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52
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53 v[u]intAxB and(v[u]intAxB vec1, v[u]intAxB vec2)
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54 bitwise AND (&) of the values in both vectors
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55
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56 v[u]intAxB or(v[u]intAxB vec1, v[u]intAxB vec2)
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57 bitwise OR (|) of the values in both vectors
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58
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59 v[u]intAxB xor(v[u]intAxB vec1, v[u]intAxB vec2)
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60 bitwise XOR (^) of the values in both vectors
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61
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62 v[u]intAxB rshift(v[u]intAxB vec1, vuintAxB vec2)
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63 arithmetic right shift of the values in vec1 by
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64 the corresponding values in vec2
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65
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66 v[u]intAxB lshift(v[u]intAxB vec1, vuintAxB vec2)
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67 arithmetic left shift of the values in vec1 by
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68 the corresponding values in vec2
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69
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70 v[u]intAxB lrshift(v[u]intAxB vec1, vuintAxB vec2)
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71 logical right shift of the values in vec1 by
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72 the corresponding values in vec2
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73
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74 v[u]intAxB avg(v[u]intAxB vec1, v[u]intAxB vec2)
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75 returns the average of the values in both vectors
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76 i.e., div(mul(vec1, vec2), splat(2))
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77
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78 there are also a number of comparisons possible:
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79
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80 v[u]intAxB cmplt(v[u]intAxB vec1, v[u]intAxB vec2)
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81 turns on all bits of the corresponding value in
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82 the result vector if the value in `vec1' is less
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83 than the corresponding value in `vec2', else all
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84 of the bits are turned off.
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85
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86 v[u]intAxB cmpgt(v[u]intAxB vec1, v[u]intAxB vec2)
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87 turns on all bits of the corresponding value in
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88 the result vector if the value in `vec1' is greater
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89 than the corresponding value in `vec2', else all
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90 of the bits are turned off.
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91
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92 v[u]intAxB cmpeq(v[u]intAxB vec1, v[u]intAxB vec2)
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93 turns on all bits of the corresponding value in
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94 the result vector if the value in `vec1' are equal
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95 to the corresponding value in `vec2', else all
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96 of the bits are turned off.
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97
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98 v[u]intAxB cmple(v[u]intAxB vec1, v[u]intAxB vec2)
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99 turns on all bits of the corresponding value in
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100 the result vector if the value in `vec1' is less
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101 than or equal to the corresponding value in `vec2',
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102 else all of the bits are turned off.
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103
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104 v[u]intAxB cmpge(v[u]intAxB vec1, v[u]intAxB vec2)
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105 turns on all bits of the corresponding value in
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106 the result vector if the value in `vec1' is greater
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107 than or equal to the corresponding value in `vec2',
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108 else all of the bits are turned off.