Mercurial > vec
annotate test/test_align.h @ 25:92156fe32755
impl/ppc/altivec: update to new implementation
the signed average function is wrong; it needs to round up the number
when only one of them is odd, but that doesn't necessarily seem to be
true because altivec is weird, and that's what we need to emulate the
quirks for. ugh.
also the altivec backend uses the generic functions instead of fallbacks
because it does indeed use the exact same memory structure as the generic
implementation...
author | Paper <paper@tflc.us> |
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date | Sun, 24 Nov 2024 11:15:59 +0000 |
parents | 41dd962abdd1 |
children |
rev | line source |
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3 | 1 static int test_align(void) |
2 { | |
3 int ret = 0; | |
4 | |
5 #define RUN_TEST(sign, csign, bits, size) \ | |
6 do { \ | |
7 /* allocate the aligned array */ \ | |
8 V##csign##INT##bits##x##size##_ALIGNED_ARRAY(vec_arr); \ | |
9 \ | |
10 /* fill the values */ \ | |
13
53197dbf4e8e
vec.h: initial refactor for runtime SSE and stuff
Paper <paper@tflc.us>
parents:
9
diff
changeset
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11 for (int i = 0; i < size; i++) \ |
3 | 12 vec_arr[i] = i; \ |
13 \ | |
14 /* try to load it */ \ | |
15 v##sign##int##bits##x##size vec = v##sign##int##bits##x##size##_load_aligned(vec_arr); \ | |
16 \ | |
17 /* now allocate an output array */ \ | |
18 V##csign##INT##bits##x##size##_ALIGNED_ARRAY(vec_arr_out); \ | |
19 \ | |
20 /* try storing it */ \ | |
21 v##sign##int##bits##x##size##_store_aligned(vec, vec_arr_out); \ | |
22 \ | |
23 /* mark success or failure */ \ | |
13
53197dbf4e8e
vec.h: initial refactor for runtime SSE and stuff
Paper <paper@tflc.us>
parents:
9
diff
changeset
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24 ret |= !!memcmp(vec_arr, vec_arr_out, size * sizeof(*vec_arr)); \ |
4
75ab77f874e2
*: aligned generics, fixed altivec, aligned tests...
Paper <paper@tflc.us>
parents:
3
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25 \ |
75ab77f874e2
*: aligned generics, fixed altivec, aligned tests...
Paper <paper@tflc.us>
parents:
3
diff
changeset
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26 ret |= !V##csign##INT##bits##x##size##_PTR_ALIGNED(vec_arr); \ |
75ab77f874e2
*: aligned generics, fixed altivec, aligned tests...
Paper <paper@tflc.us>
parents:
3
diff
changeset
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27 ret |= !V##csign##INT##bits##x##size##_PTR_ALIGNED(vec_arr_out); \ |
3 | 28 } while (0); |
29 | |
30 #define RUN_TESTS(bits, size) \ | |
31 RUN_TEST( , , bits, size) \ | |
32 RUN_TEST(u, U, bits, size) | |
33 | |
17
41dd962abdd1
*: allow compiling vec in a C++ translation unit
Paper <paper@tflc.us>
parents:
15
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34 RUN_TESTS(8, 2) |
41dd962abdd1
*: allow compiling vec in a C++ translation unit
Paper <paper@tflc.us>
parents:
15
diff
changeset
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35 |
41dd962abdd1
*: allow compiling vec in a C++ translation unit
Paper <paper@tflc.us>
parents:
15
diff
changeset
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36 RUN_TESTS(8, 4) |
41dd962abdd1
*: allow compiling vec in a C++ translation unit
Paper <paper@tflc.us>
parents:
15
diff
changeset
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37 RUN_TESTS(16, 2) |
41dd962abdd1
*: allow compiling vec in a C++ translation unit
Paper <paper@tflc.us>
parents:
15
diff
changeset
|
38 |
15
e05c257c6a23
*: huge refactor, add many new x86 intrinsics and the like
Paper <paper@tflc.us>
parents:
13
diff
changeset
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39 RUN_TESTS(8, 8) |
e05c257c6a23
*: huge refactor, add many new x86 intrinsics and the like
Paper <paper@tflc.us>
parents:
13
diff
changeset
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40 RUN_TESTS(16, 4) |
e05c257c6a23
*: huge refactor, add many new x86 intrinsics and the like
Paper <paper@tflc.us>
parents:
13
diff
changeset
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41 RUN_TESTS(32, 2) |
e05c257c6a23
*: huge refactor, add many new x86 intrinsics and the like
Paper <paper@tflc.us>
parents:
13
diff
changeset
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42 |
3 | 43 RUN_TESTS(8, 16) |
15
e05c257c6a23
*: huge refactor, add many new x86 intrinsics and the like
Paper <paper@tflc.us>
parents:
13
diff
changeset
|
44 RUN_TESTS(16, 8) |
e05c257c6a23
*: huge refactor, add many new x86 intrinsics and the like
Paper <paper@tflc.us>
parents:
13
diff
changeset
|
45 RUN_TESTS(32, 4) |
e05c257c6a23
*: huge refactor, add many new x86 intrinsics and the like
Paper <paper@tflc.us>
parents:
13
diff
changeset
|
46 RUN_TESTS(64, 2) |
e05c257c6a23
*: huge refactor, add many new x86 intrinsics and the like
Paper <paper@tflc.us>
parents:
13
diff
changeset
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47 |
e05c257c6a23
*: huge refactor, add many new x86 intrinsics and the like
Paper <paper@tflc.us>
parents:
13
diff
changeset
|
48 RUN_TESTS(8, 32) |
e05c257c6a23
*: huge refactor, add many new x86 intrinsics and the like
Paper <paper@tflc.us>
parents:
13
diff
changeset
|
49 RUN_TESTS(16, 16) |
e05c257c6a23
*: huge refactor, add many new x86 intrinsics and the like
Paper <paper@tflc.us>
parents:
13
diff
changeset
|
50 RUN_TESTS(32, 8) |
e05c257c6a23
*: huge refactor, add many new x86 intrinsics and the like
Paper <paper@tflc.us>
parents:
13
diff
changeset
|
51 RUN_TESTS(64, 4) |
e05c257c6a23
*: huge refactor, add many new x86 intrinsics and the like
Paper <paper@tflc.us>
parents:
13
diff
changeset
|
52 |
e05c257c6a23
*: huge refactor, add many new x86 intrinsics and the like
Paper <paper@tflc.us>
parents:
13
diff
changeset
|
53 RUN_TESTS(8, 64) |
e05c257c6a23
*: huge refactor, add many new x86 intrinsics and the like
Paper <paper@tflc.us>
parents:
13
diff
changeset
|
54 RUN_TESTS(16, 32) |
e05c257c6a23
*: huge refactor, add many new x86 intrinsics and the like
Paper <paper@tflc.us>
parents:
13
diff
changeset
|
55 RUN_TESTS(32, 16) |
e05c257c6a23
*: huge refactor, add many new x86 intrinsics and the like
Paper <paper@tflc.us>
parents:
13
diff
changeset
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56 RUN_TESTS(64, 8) |
9
6ff0b7a44bb6
generic: add initial support for 256-bit and 512-bit types
Paper <paper@tflc.us>
parents:
4
diff
changeset
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57 |
3 | 58 #undef RUN_TESTS |
59 #undef RUN_TEST | |
60 | |
61 return ret; | |
62 } |