Mercurial > vec
annotate src/impl/arm/neon.c @ 24:e49e70f7012f
impl/x86: add static assertions for alignment and size
author | Paper <paper@tflc.us> |
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date | Sun, 24 Nov 2024 03:32:53 -0500 |
parents | e26874655738 |
children | d00b95f95dd1 |
rev | line source |
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1 /** |
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2 * vec - a tiny SIMD vector library in C99 |
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3 * |
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4 * Copyright (c) 2024 Paper |
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5 * |
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6 * Permission is hereby granted, free of charge, to any person obtaining a copy |
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7 * of this software and associated documentation files (the "Software"), to deal |
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8 * in the Software without restriction, including without limitation the rights |
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9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell |
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10 * copies of the Software, and to permit persons to whom the Software is |
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11 * furnished to do so, subject to the following conditions: |
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12 * |
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13 * The above copyright notice and this permission notice shall be included in all |
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14 * copies or substantial portions of the Software. |
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15 * |
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16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
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17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
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18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE |
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19 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
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20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, |
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21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE |
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22 * SOFTWARE. |
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23 **/ |
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24 |
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25 #include "vec/impl/arm/neon.h" |
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26 |
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27 #include <arm_neon.h> |
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28 |
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29 // There is LOTS of preprocessor hacking here (as if the other files |
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30 // weren't bad enough... lol) |
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31 |
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32 #define VEC_DEFINE_OPERATIONS_SIGN(sign, csign, bits, size) \ |
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33 static v##sign##int##bits##x##size v##sign##int##bits##x##size##_neon_load_aligned(const vec_##sign##int##bits in[size]) \ |
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34 { \ |
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35 v##sign##int##bits##x##size vec; \ |
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36 vec.neon = vld1_##sign##bits(in); \ |
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37 return vec; \ |
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38 } \ |
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39 \ |
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40 static void v##sign##int##bits##x##size##_neon_store_aligned(v##sign##int##bits##x##size vec, vec_##sign##int##bits out[size]) \ |
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41 { \ |
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42 vstore_lane_##bits(sign, vec.neon, out); \ |
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43 } \ |
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44 \ |
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45 static v##sign##int##bits##x##size v##sign##int##bits##x##size##_neon_add(v##sign##int##bits##x##size vec1, v##sign##int##bits##x##size vec2) \ |
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46 { \ |
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47 v##sign##int##bits##x##size vec; \ |
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48 vec.neon = vadd_##sign##bits(vec1.neon, vec2.neon); \ |
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49 return vec; \ |
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50 } \ |
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51 \ |
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52 static v##sign##int##bits##x##size v##sign##int##bits##x##size##_neon_sub(v##sign##int##bits##x##size vec1, v##sign##int##bits##x##size vec2) \ |
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53 { \ |
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54 v##sign##int##bits##x##size vec; \ |
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55 vec.neon = vsub_##sign##bits(vec1.neon, vec2.neon); \ |
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56 return vec; \ |
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57 } \ |
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58 \ |
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59 static v##sign##int##bits##x##size v##sign##int##bits##x##size##_neon_mul(v##sign##int##bits##x##size vec1, v##sign##int##bits##x##size vec2) \ |
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60 { \ |
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61 v##sign##int##bits##x##size vec; \ |
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62 vec.neon = vmul_##sign##bits(vec1.neon, vec2.neon); \ |
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63 return vec; \ |
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64 } \ |
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65 \ |
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66 static v##sign##int##bits##x##size v##sign##int##bits##x##size##_neon_lshift(v##sign##int##bits##x##size vec1, vuint##bits##x##size vec2) \ |
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67 { \ |
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68 v##sign##int##bits##x##size vec; \ |
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69 vec.neon = vshl_##sign##bits(vec1.neon, vreinterpret_##bits##_u##bits(vec2.neon)); \ |
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70 return vec; \ |
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71 } \ |
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72 \ |
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73 static v##sign##int##bits##x##size v##sign##int##bits##x##size##_neon_and(v##sign##int##bits##x##size vec1, v##sign##int##bits##x##size vec2) \ |
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74 { \ |
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75 v##sign##int##bits##x##size vec; \ |
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76 vec.neon = vand_##sign##bits(vec1.neon, vec2.neon); \ |
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77 return vec; \ |
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78 } \ |
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79 \ |
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80 static v##sign##int##bits##x##size v##sign##int##bits##x##size##_neon_or(v##sign##int##bits##x##size vec1, v##sign##int##bits##x##size vec2) \ |
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81 { \ |
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82 v##sign##int##bits##x##size vec; \ |
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83 vec.neon = vorr_##sign##bits(vec1.neon, vec2.neon); \ |
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84 return vec; \ |
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85 } \ |
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86 \ |
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87 static v##sign##int##bits##x##size v##sign##int##bits##x##size##_neon_xor(v##sign##int##bits##x##size vec1, v##sign##int##bits##x##size vec2) \ |
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88 { \ |
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89 v##sign##int##bits##x##size vec; \ |
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90 vec.neon = veor_##sign##bits(vec1.neon, vec2.neon); \ |
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91 return vec; \ |
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92 } \ |
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93 \ |
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94 static v##sign##int##bits##x##size##_impl v##sign##int##bits##x##size##_impl_neon = { \ |
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95 /* .splat = */ NULL, \ |
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96 v##sign##int##bits##x##size##_neon_load_aligned, \ |
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97 v##sign##int##bits##x##size##_neon_load_aligned, \ |
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98 v##sign##int##bits##x##size##_neon_store_aligned, \ |
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99 v##sign##int##bits##x##size##_neon_store_aligned, \ |
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100 v##sign##int##bits##x##size##_neon_add, \ |
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101 v##sign##int##bits##x##size##_neon_sub, \ |
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102 v##sign##int##bits##x##size##_neon_mul, \ |
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103 /* .div = */ NULL, \ |
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104 /* .avg = */ NULL, \ |
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105 v##sign##int##bits##x##size##_neon_and, \ |
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106 v##sign##int##bits##x##size##_neon_or, \ |
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107 v##sign##int##bits##x##size##_neon_xor, \ |
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108 /* .not = */ NULL, \ |
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109 v##sign##int##bits##x##size##_neon_lshift, \ |
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110 /* .rshift = */ NULL, \ |
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111 /* .lrshift = */ NULL, \ |
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112 }; |
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113 |
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114 #define VEC_DEFINE_OPERATIONS(bits, size) \ |
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115 VEC_DEFINE_OPERATIONS_SIGN( , , bits, size) \ |
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116 VEC_DEFINE_OPERATIONS_SIGN(u, U, bits, size) |
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117 |
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118 // Ok, we'll start out with the 64-bit types. |
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119 |
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120 #define vadd_8 vadd_s8 |
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121 #define vadd_16 vadd_s16 |
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122 #define vadd_32 vadd_s32 |
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123 #define vsub_8 vsub_s8 |
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124 #define vsub_16 vsub_s16 |
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125 #define vsub_32 vsub_s32 |
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126 #define vmul_8 vmul_s8 |
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127 #define vmul_16 vmul_s16 |
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128 #define vmul_32 vmul_s32 |
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129 #define vshl_8 vshl_s8 |
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130 #define vshl_16 vshl_s16 |
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131 #define vshl_32 vshl_s32 |
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132 #define veor_8 veor_s8 |
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133 #define veor_16 veor_s16 |
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134 #define veor_32 veor_s32 |
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135 #define vorr_8 vorr_s8 |
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136 #define vorr_16 vorr_s16 |
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137 #define vorr_32 vorr_s32 |
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138 #define vand_8 vand_s8 |
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139 #define vand_16 vand_s16 |
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140 #define vand_32 vand_s32 |
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141 #define vld1_8 vld1_s8 |
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142 #define vld1_16 vld1_s16 |
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143 #define vld1_32 vld1_s32 |
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144 #define vget_lane_8 vget_lane_s8 |
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145 #define vget_lane_16 vget_lane_s16 |
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146 #define vget_lane_32 vget_lane_s32 |
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147 #define vstore_lane_8(sign, vec, out) \ |
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148 do { \ |
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149 out[0] = vget_lane_##sign##8(vec, 0); \ |
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150 out[1] = vget_lane_##sign##8(vec, 1); \ |
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151 out[2] = vget_lane_##sign##8(vec, 2); \ |
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152 out[3] = vget_lane_##sign##8(vec, 3); \ |
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153 out[4] = vget_lane_##sign##8(vec, 4); \ |
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154 out[5] = vget_lane_##sign##8(vec, 5); \ |
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155 out[6] = vget_lane_##sign##8(vec, 6); \ |
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156 out[7] = vget_lane_##sign##8(vec, 7); \ |
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157 } while (0) |
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158 #define vstore_lane_16(sign, vec, out) \ |
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159 do { \ |
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160 out[0] = vget_lane_##sign##16(vec, 0); \ |
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161 out[1] = vget_lane_##sign##16(vec, 1); \ |
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162 out[2] = vget_lane_##sign##16(vec, 2); \ |
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163 out[3] = vget_lane_##sign##16(vec, 3); \ |
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164 } while (0) |
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165 #define vstore_lane_32(sign, vec, out) \ |
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166 do { \ |
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167 out[0] = vget_lane_##sign##32(vec, 0); \ |
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168 out[1] = vget_lane_##sign##32(vec, 1); \ |
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169 } while (0) |
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170 #define vreinterpret_8_u8(x) vreinterpret_s8_u8(x) |
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171 #define vreinterpret_16_u16(x) vreinterpret_s16_u16(x) |
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172 #define vreinterpret_32_u32(x) vreinterpret_s32_u32(x) |
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173 |
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174 VEC_DEFINE_OPERATIONS(8, 8) |
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175 VEC_DEFINE_OPERATIONS(16, 4) |
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176 VEC_DEFINE_OPERATIONS(32, 2) |
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177 |
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178 #undef vadd_8 |
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179 #undef vadd_16 |
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180 #undef vadd_32 |
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181 #undef vsub_8 |
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182 #undef vsub_16 |
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183 #undef vsub_32 |
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184 #undef vmul_8 |
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185 #undef vmul_16 |
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186 #undef vmul_32 |
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187 #undef vshl_8 |
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188 #undef vshl_16 |
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189 #undef vshl_32 |
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190 #undef veor_8 |
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191 #undef veor_16 |
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192 #undef veor_32 |
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193 #undef vorr_8 |
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194 #undef vorr_16 |
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195 #undef vorr_32 |
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196 #undef vand_8 |
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197 #undef vand_16 |
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198 #undef vand_32 |
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199 #undef vld1_8 |
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200 #undef vld1_16 |
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201 #undef vld1_32 |
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202 #undef vget_lane_8 |
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203 #undef vget_lane_16 |
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204 #undef vget_lane_32 |
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205 #undef vstore_lane_8 |
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206 #undef vstore_lane_16 |
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207 #undef vstore_lane_32 |
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208 #undef vreinterpret_8_u8 |
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209 #undef vreinterpret_16_u16 |
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210 #undef vreinterpret_32_u32 |
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211 |
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212 /////////////////////////////////////////////////////////////////////////////// |
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213 // 128-bit |
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214 |
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215 // Now we can go ahead and do the 128-bit ones. |
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216 |
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217 // NEON doesn't have native 64-bit multiplication, so we have |
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218 // to do it ourselves |
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219 static inline int64x2_t vmulq_s64(const int64x2_t a, const int64x2_t b) |
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220 { |
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221 const uint32x2_t ac = vreinterpret_u32_s32(vmovn_s64(a)); |
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222 const uint32x2_t pr = vreinterpret_u32_s32(vmovn_s64(b)); |
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223 |
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224 const int32x4_t hi = vmulq_s32(vreinterpretq_s32_s64(b), vreinterpretq_s32_s64(a)); |
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225 |
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226 return vreinterpretq_s64_u64(vmlal_u32(vreinterpretq_u64_s64(vshlq_n_s64(vreinterpretq_s64_u64(vpaddlq_u32(vreinterpretq_u32_s32(hi))), 32)), ac, pr)); |
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227 } |
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228 |
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229 static inline uint64x2_t vmulq_u64(const uint64x2_t a, const uint64x2_t b) |
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230 { |
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231 const uint32x2_t ac = vmovn_u64(a); |
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232 const uint32x2_t pr = vmovn_u64(b); |
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233 |
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234 const uint32x4_t hi = vmulq_u32(vreinterpretq_u32_u64(b), vreinterpretq_u32_u64(a)); |
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235 |
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236 return vmlal_u32(vshlq_n_u64(vpaddlq_u32(hi), 32), ac, pr); |
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237 } |
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238 |
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239 #define vadd_8 vaddq_s8 |
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240 #define vadd_16 vaddq_s16 |
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241 #define vadd_32 vaddq_s32 |
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242 #define vadd_64 vaddq_s64 |
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243 #define vadd_u8 vaddq_u8 |
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244 #define vadd_u16 vaddq_u16 |
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245 #define vadd_u32 vaddq_u32 |
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246 #define vadd_u64 vaddq_u64 |
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247 #define vsub_8 vsubq_s8 |
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248 #define vsub_16 vsubq_s16 |
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249 #define vsub_32 vsubq_s32 |
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250 #define vsub_64 vsubq_s64 |
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251 #define vsub_u8 vsubq_u8 |
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252 #define vsub_u16 vsubq_u16 |
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253 #define vsub_u32 vsubq_u32 |
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254 #define vsub_u64 vsubq_u64 |
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255 #define vmul_8 vmulq_s8 |
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256 #define vmul_16 vmulq_s16 |
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257 #define vmul_32 vmulq_s32 |
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258 #define vmul_64 vmulq_s64 |
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259 #define vmul_u8 vmulq_u8 |
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260 #define vmul_u16 vmulq_u16 |
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261 #define vmul_u32 vmulq_u32 |
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262 #define vmul_u64 vmulq_u64 |
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263 #define vshl_8 vshlq_s8 |
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264 #define vshl_16 vshlq_s16 |
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265 #define vshl_32 vshlq_s32 |
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266 #define vshl_64 vshlq_s64 |
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267 #define vshl_u8 vshlq_u8 |
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268 #define vshl_u16 vshlq_u16 |
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269 #define vshl_u32 vshlq_u32 |
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270 #define vshl_u64 vshlq_u64 |
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271 #define veor_8 veorq_s8 |
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272 #define veor_16 veorq_s16 |
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273 #define veor_32 veorq_s32 |
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274 #define veor_64 veorq_s64 |
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275 #define veor_u8 veorq_u8 |
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276 #define veor_u16 veorq_u16 |
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277 #define veor_u32 veorq_u32 |
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278 #define veor_u64 veorq_u64 |
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279 #define vorr_8 vorrq_s8 |
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280 #define vorr_16 vorrq_s16 |
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281 #define vorr_32 vorrq_s32 |
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282 #define vorr_64 vorrq_s64 |
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283 #define vorr_u8 vorrq_u8 |
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284 #define vorr_u16 vorrq_u16 |
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285 #define vorr_u32 vorrq_u32 |
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286 #define vorr_u64 vorrq_u64 |
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287 #define vand_8 vandq_s8 |
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288 #define vand_16 vandq_s16 |
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289 #define vand_32 vandq_s32 |
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290 #define vand_64 vandq_s64 |
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291 #define vand_u8 vandq_u8 |
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292 #define vand_u16 vandq_u16 |
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293 #define vand_u32 vandq_u32 |
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294 #define vand_u64 vandq_u64 |
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295 #define vld1_8 vld1q_s8 |
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296 #define vld1_16 vld1q_s16 |
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297 #define vld1_32 vld1q_s32 |
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298 #define vld1_64 vld1q_s64 |
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299 #define vld1_u8 vld1q_u8 |
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300 #define vld1_u16 vld1q_u16 |
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301 #define vld1_u32 vld1q_u32 |
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302 #define vld1_u64 vld1q_u64 |
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303 #define vget_lane_8 vgetq_lane_s8 |
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304 #define vget_lane_16 vgetq_lane_s16 |
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305 #define vget_lane_32 vgetq_lane_s32 |
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306 #define vget_lane_64 vgetq_lane_s64 |
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307 #define vget_lane_u8 vgetq_lane_u8 |
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308 #define vget_lane_u16 vgetq_lane_u16 |
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309 #define vget_lane_u32 vgetq_lane_u32 |
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310 #define vget_lane_u64 vgetq_lane_u64 |
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311 #define vstore_lane_8(sign, vec, out) \ |
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312 do { \ |
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313 out[0] = vget_lane_##sign##8(vec, 0); \ |
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314 out[1] = vget_lane_##sign##8(vec, 1); \ |
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315 out[2] = vget_lane_##sign##8(vec, 2); \ |
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316 out[3] = vget_lane_##sign##8(vec, 3); \ |
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317 out[4] = vget_lane_##sign##8(vec, 4); \ |
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318 out[5] = vget_lane_##sign##8(vec, 5); \ |
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319 out[6] = vget_lane_##sign##8(vec, 6); \ |
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320 out[7] = vget_lane_##sign##8(vec, 7); \ |
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321 out[8] = vget_lane_##sign##8(vec, 8); \ |
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322 out[9] = vget_lane_##sign##8(vec, 9); \ |
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323 out[10] = vget_lane_##sign##8(vec, 10); \ |
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324 out[11] = vget_lane_##sign##8(vec, 11); \ |
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325 out[12] = vget_lane_##sign##8(vec, 12); \ |
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326 out[13] = vget_lane_##sign##8(vec, 13); \ |
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327 out[14] = vget_lane_##sign##8(vec, 14); \ |
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328 out[15] = vget_lane_##sign##8(vec, 15); \ |
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329 } while (0) |
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330 #define vstore_lane_16(sign, vec, out) \ |
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331 do { \ |
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332 out[0] = vget_lane_##sign##16(vec, 0); \ |
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333 out[1] = vget_lane_##sign##16(vec, 1); \ |
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334 out[2] = vget_lane_##sign##16(vec, 2); \ |
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335 out[3] = vget_lane_##sign##16(vec, 3); \ |
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336 out[4] = vget_lane_##sign##16(vec, 4); \ |
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337 out[5] = vget_lane_##sign##16(vec, 5); \ |
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338 out[6] = vget_lane_##sign##16(vec, 6); \ |
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339 out[7] = vget_lane_##sign##16(vec, 7); \ |
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340 } while (0) |
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341 #define vstore_lane_32(sign, vec, out) \ |
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342 do { \ |
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343 out[0] = vget_lane_##sign##32(vec, 0); \ |
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344 out[1] = vget_lane_##sign##32(vec, 1); \ |
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345 out[2] = vget_lane_##sign##32(vec, 2); \ |
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346 out[3] = vget_lane_##sign##32(vec, 3); \ |
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347 } while (0) |
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348 #define vstore_lane_64(sign, vec, out) \ |
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349 do { \ |
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350 out[0] = vget_lane_##sign##64(vec, 0); \ |
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351 out[1] = vget_lane_##sign##64(vec, 1); \ |
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352 } while (0) |
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353 #define vreinterpret_8_u8(x) vreinterpretq_s8_u8(x) |
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354 #define vreinterpret_16_u16(x) vreinterpretq_s16_u16(x) |
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355 #define vreinterpret_32_u32(x) vreinterpretq_s32_u32(x) |
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356 #define vreinterpret_64_u64(x) vreinterpretq_s64_u64(x) |
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357 |
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358 #define VEC_DEFINE_OPERATIONS_SIGN(sign, csign, bits, size) \ |
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359 static v##sign##int##bits##x##size v##sign##int##bits##x##size##_neon_load_aligned(const vec_##sign##int##bits in[size]) \ |
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360 { \ |
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361 v##sign##int##bits##x##size vec; \ |
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362 vec.neon = vld1_##sign##bits(in); \ |
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363 return vec; \ |
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364 } \ |
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Paper <paper@tflc.us>
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365 \ |
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366 static void v##sign##int##bits##x##size##_neon_store_aligned(v##sign##int##bits##x##size vec, vec_##sign##int##bits out[size]) \ |
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367 { \ |
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Paper <paper@tflc.us>
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368 vstore_lane_##bits(sign, vec.neon, out); \ |
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Paper <paper@tflc.us>
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369 } \ |
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370 \ |
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Paper <paper@tflc.us>
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371 static v##sign##int##bits##x##size v##sign##int##bits##x##size##_neon_add(v##sign##int##bits##x##size vec1, v##sign##int##bits##x##size vec2) \ |
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Paper <paper@tflc.us>
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372 { \ |
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Paper <paper@tflc.us>
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373 v##sign##int##bits##x##size vec; \ |
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374 vec.neon = vadd_##sign##bits(vec1.neon, vec2.neon); \ |
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375 return vec; \ |
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Paper <paper@tflc.us>
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376 } \ |
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Paper <paper@tflc.us>
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377 \ |
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Paper <paper@tflc.us>
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378 static v##sign##int##bits##x##size v##sign##int##bits##x##size##_neon_sub(v##sign##int##bits##x##size vec1, v##sign##int##bits##x##size vec2) \ |
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Paper <paper@tflc.us>
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379 { \ |
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Paper <paper@tflc.us>
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380 v##sign##int##bits##x##size vec; \ |
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381 vec.neon = vsub_##sign##bits(vec1.neon, vec2.neon); \ |
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Paper <paper@tflc.us>
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382 return vec; \ |
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Paper <paper@tflc.us>
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383 } \ |
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Paper <paper@tflc.us>
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384 \ |
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Paper <paper@tflc.us>
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385 static v##sign##int##bits##x##size v##sign##int##bits##x##size##_neon_mul(v##sign##int##bits##x##size vec1, v##sign##int##bits##x##size vec2) \ |
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Paper <paper@tflc.us>
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386 { \ |
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Paper <paper@tflc.us>
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387 v##sign##int##bits##x##size vec; \ |
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388 vec.neon = vmul_##sign##bits(vec1.neon, vec2.neon); \ |
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389 return vec; \ |
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Paper <paper@tflc.us>
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390 } \ |
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Paper <paper@tflc.us>
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391 \ |
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Paper <paper@tflc.us>
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392 static v##sign##int##bits##x##size v##sign##int##bits##x##size##_neon_lshift(v##sign##int##bits##x##size vec1, vuint##bits##x##size vec2) \ |
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Paper <paper@tflc.us>
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393 { \ |
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394 v##sign##int##bits##x##size vec; \ |
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395 vec.neon = vshl_##sign##bits(vec1.neon, vreinterpret_##bits##_u##bits(vec2.neon)); \ |
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396 return vec; \ |
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Paper <paper@tflc.us>
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397 } \ |
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Paper <paper@tflc.us>
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398 \ |
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Paper <paper@tflc.us>
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399 static v##sign##int##bits##x##size v##sign##int##bits##x##size##_neon_and(v##sign##int##bits##x##size vec1, v##sign##int##bits##x##size vec2) \ |
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Paper <paper@tflc.us>
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400 { \ |
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Paper <paper@tflc.us>
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401 v##sign##int##bits##x##size vec; \ |
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402 vec.neon = vand_##sign##bits(vec1.neon, vec2.neon); \ |
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403 return vec; \ |
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Paper <paper@tflc.us>
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404 } \ |
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Paper <paper@tflc.us>
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405 \ |
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Paper <paper@tflc.us>
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406 static v##sign##int##bits##x##size v##sign##int##bits##x##size##_neon_or(v##sign##int##bits##x##size vec1, v##sign##int##bits##x##size vec2) \ |
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Paper <paper@tflc.us>
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407 { \ |
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Paper <paper@tflc.us>
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408 v##sign##int##bits##x##size vec; \ |
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409 vec.neon = vorr_##sign##bits(vec1.neon, vec2.neon); \ |
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Paper <paper@tflc.us>
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410 return vec; \ |
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Paper <paper@tflc.us>
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411 } \ |
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Paper <paper@tflc.us>
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412 \ |
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Paper <paper@tflc.us>
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413 static v##sign##int##bits##x##size v##sign##int##bits##x##size##_neon_xor(v##sign##int##bits##x##size vec1, v##sign##int##bits##x##size vec2) \ |
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Paper <paper@tflc.us>
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414 { \ |
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Paper <paper@tflc.us>
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415 v##sign##int##bits##x##size vec; \ |
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*: huge refactor, new major release (hahaha)
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416 vec.neon = veor_##sign##bits(vec1.neon, vec2.neon); \ |
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Paper <paper@tflc.us>
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417 return vec; \ |
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Paper <paper@tflc.us>
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418 } \ |
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Paper <paper@tflc.us>
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419 \ |
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Paper <paper@tflc.us>
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420 static v##sign##int##bits##x##size##_impl v##sign##int##bits##x##size##_impl_neon = { \ |
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Paper <paper@tflc.us>
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421 /* .splat = */ NULL, \ |
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*: huge refactor, new major release (hahaha)
Paper <paper@tflc.us>
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422 v##sign##int##bits##x##size##_neon_load_aligned, \ |
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*: huge refactor, new major release (hahaha)
Paper <paper@tflc.us>
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423 v##sign##int##bits##x##size##_neon_load_aligned, \ |
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Paper <paper@tflc.us>
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424 v##sign##int##bits##x##size##_neon_store_aligned, \ |
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*: huge refactor, new major release (hahaha)
Paper <paper@tflc.us>
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425 v##sign##int##bits##x##size##_neon_store_aligned, \ |
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*: huge refactor, new major release (hahaha)
Paper <paper@tflc.us>
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426 v##sign##int##bits##x##size##_neon_add, \ |
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*: huge refactor, new major release (hahaha)
Paper <paper@tflc.us>
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427 v##sign##int##bits##x##size##_neon_sub, \ |
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*: huge refactor, new major release (hahaha)
Paper <paper@tflc.us>
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428 v##sign##int##bits##x##size##_neon_mul, \ |
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*: huge refactor, new major release (hahaha)
Paper <paper@tflc.us>
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429 /* .div = */ NULL, \ |
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*: huge refactor, new major release (hahaha)
Paper <paper@tflc.us>
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430 /* .avg = */ NULL, \ |
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Paper <paper@tflc.us>
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431 v##sign##int##bits##x##size##_neon_and, \ |
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*: huge refactor, new major release (hahaha)
Paper <paper@tflc.us>
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432 v##sign##int##bits##x##size##_neon_or, \ |
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Paper <paper@tflc.us>
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433 v##sign##int##bits##x##size##_neon_xor, \ |
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Paper <paper@tflc.us>
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434 /* .not = */ NULL, \ |
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*: huge refactor, new major release (hahaha)
Paper <paper@tflc.us>
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435 v##sign##int##bits##x##size##_neon_lshift, \ |
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Paper <paper@tflc.us>
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diff
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436 /* .rshift = */ NULL, \ |
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Paper <paper@tflc.us>
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437 /* .lrshift = */ NULL, \ |
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Paper <paper@tflc.us>
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438 }; |
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Paper <paper@tflc.us>
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|
439 |
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Paper <paper@tflc.us>
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440 #define VEC_DEFINE_OPERATIONS(bits, size) \ |
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Paper <paper@tflc.us>
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441 VEC_DEFINE_OPERATIONS_SIGN( , , bits, size) \ |
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*: huge refactor, new major release (hahaha)
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442 VEC_DEFINE_OPERATIONS_SIGN(u, U, bits, size) |
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*: huge refactor, new major release (hahaha)
Paper <paper@tflc.us>
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443 |
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Paper <paper@tflc.us>
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444 VEC_DEFINE_OPERATIONS(8, 16) |
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*: huge refactor, new major release (hahaha)
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445 VEC_DEFINE_OPERATIONS(16, 8) |
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446 VEC_DEFINE_OPERATIONS(32, 4) |
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447 VEC_DEFINE_OPERATIONS(64, 2) |
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Paper <paper@tflc.us>
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|
448 |
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Paper <paper@tflc.us>
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|
449 #undef vadd_8 |
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Paper <paper@tflc.us>
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|
450 #undef vadd_16 |
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Paper <paper@tflc.us>
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|
451 #undef vadd_32 |
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*: huge refactor, new major release (hahaha)
Paper <paper@tflc.us>
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|
452 #undef vadd_64 |
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*: huge refactor, new major release (hahaha)
Paper <paper@tflc.us>
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|
453 #undef vsub_8 |
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*: huge refactor, new major release (hahaha)
Paper <paper@tflc.us>
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|
454 #undef vsub_16 |
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*: huge refactor, new major release (hahaha)
Paper <paper@tflc.us>
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|
455 #undef vsub_32 |
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*: huge refactor, new major release (hahaha)
Paper <paper@tflc.us>
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|
456 #undef vsub_64 |
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*: huge refactor, new major release (hahaha)
Paper <paper@tflc.us>
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|
457 #undef vmul_8 |
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*: huge refactor, new major release (hahaha)
Paper <paper@tflc.us>
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|
458 #undef vmul_16 |
e26874655738
*: huge refactor, new major release (hahaha)
Paper <paper@tflc.us>
parents:
diff
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|
459 #undef vmul_32 |
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*: huge refactor, new major release (hahaha)
Paper <paper@tflc.us>
parents:
diff
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|
460 #undef vmul_64 |
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*: huge refactor, new major release (hahaha)
Paper <paper@tflc.us>
parents:
diff
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|
461 #undef vshl_8 |
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*: huge refactor, new major release (hahaha)
Paper <paper@tflc.us>
parents:
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|
462 #undef vshl_16 |
e26874655738
*: huge refactor, new major release (hahaha)
Paper <paper@tflc.us>
parents:
diff
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|
463 #undef vshl_32 |
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*: huge refactor, new major release (hahaha)
Paper <paper@tflc.us>
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|
464 #undef vshl_64 |
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*: huge refactor, new major release (hahaha)
Paper <paper@tflc.us>
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|
465 #undef veor_8 |
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*: huge refactor, new major release (hahaha)
Paper <paper@tflc.us>
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|
466 #undef veor_16 |
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*: huge refactor, new major release (hahaha)
Paper <paper@tflc.us>
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|
467 #undef veor_32 |
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*: huge refactor, new major release (hahaha)
Paper <paper@tflc.us>
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|
468 #undef veor_64 |
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*: huge refactor, new major release (hahaha)
Paper <paper@tflc.us>
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diff
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|
469 #undef vorr_8 |
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*: huge refactor, new major release (hahaha)
Paper <paper@tflc.us>
parents:
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|
470 #undef vorr_16 |
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*: huge refactor, new major release (hahaha)
Paper <paper@tflc.us>
parents:
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|
471 #undef vorr_32 |
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*: huge refactor, new major release (hahaha)
Paper <paper@tflc.us>
parents:
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|
472 #undef vorr_64 |
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*: huge refactor, new major release (hahaha)
Paper <paper@tflc.us>
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|
473 #undef vand_8 |
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*: huge refactor, new major release (hahaha)
Paper <paper@tflc.us>
parents:
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|
474 #undef vand_16 |
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*: huge refactor, new major release (hahaha)
Paper <paper@tflc.us>
parents:
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|
475 #undef vand_32 |
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*: huge refactor, new major release (hahaha)
Paper <paper@tflc.us>
parents:
diff
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|
476 #undef vand_64 |
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*: huge refactor, new major release (hahaha)
Paper <paper@tflc.us>
parents:
diff
changeset
|
477 #undef vld1_8 |
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*: huge refactor, new major release (hahaha)
Paper <paper@tflc.us>
parents:
diff
changeset
|
478 #undef vld1_16 |
e26874655738
*: huge refactor, new major release (hahaha)
Paper <paper@tflc.us>
parents:
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|
479 #undef vld1_32 |
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*: huge refactor, new major release (hahaha)
Paper <paper@tflc.us>
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|
480 #undef vld1_64 |
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*: huge refactor, new major release (hahaha)
Paper <paper@tflc.us>
parents:
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|
481 #undef vget_lane_8 |
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*: huge refactor, new major release (hahaha)
Paper <paper@tflc.us>
parents:
diff
changeset
|
482 #undef vget_lane_16 |
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*: huge refactor, new major release (hahaha)
Paper <paper@tflc.us>
parents:
diff
changeset
|
483 #undef vget_lane_32 |
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*: huge refactor, new major release (hahaha)
Paper <paper@tflc.us>
parents:
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|
484 #undef vget_lane_64 |
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*: huge refactor, new major release (hahaha)
Paper <paper@tflc.us>
parents:
diff
changeset
|
485 #undef vstore_lane_8 |
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*: huge refactor, new major release (hahaha)
Paper <paper@tflc.us>
parents:
diff
changeset
|
486 #undef vstore_lane_16 |
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*: huge refactor, new major release (hahaha)
Paper <paper@tflc.us>
parents:
diff
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|
487 #undef vstore_lane_32 |
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Paper <paper@tflc.us>
parents:
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|
488 #undef vstore_lane_64 |