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impl/arm/neon: it compiles again, but is untested
author Paper <paper@tflc.us>
date Mon, 25 Nov 2024 00:33:02 -0500
parents e49e70f7012f
children
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23
e26874655738 *: huge refactor, new major release (hahaha)
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1 /**
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2 * vec - a tiny SIMD vector library in C99
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3 *
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4 * Copyright (c) 2024 Paper
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5 *
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6 * Permission is hereby granted, free of charge, to any person obtaining a copy
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7 * of this software and associated documentation files (the "Software"), to deal
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8 * in the Software without restriction, including without limitation the rights
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9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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10 * copies of the Software, and to permit persons to whom the Software is
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11 * furnished to do so, subject to the following conditions:
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12 *
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13 * The above copyright notice and this permission notice shall be included in all
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14 * copies or substantial portions of the Software.
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15 *
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16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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19 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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22 * SOFTWARE.
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23 **/
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24
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25 #include "vec/impl/x86/avx512f.h"
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26 #include "vec/impl/generic.h"
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27
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28 #include <immintrin.h>
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29
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30 // this is a stupid amount of work just to do these operations, is it really worth it ?
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31 // also same note in avx2.c applies here, these do not handle sign bits properly, which
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32 // isn't that big of a deal for regular arithmetic operations, but matters quite a bit
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33 // when doing things like arithmetic shifts.
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34 #define VEC_AVX512F_OPERATION_8x64(op, sign) \
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35 do { \
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36 union v##sign##int8x64_impl_data *vec1d = (union v##sign##int8x64_impl_data *)&vec1; \
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37 union v##sign##int8x64_impl_data *vec2d = (union v##sign##int8x64_impl_data *)&vec2; \
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38 \
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39 /* unpack and operate */ \
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40 __m512i dst_1 = _mm512_##op##_epi32(_mm512_srli_epi32(_mm512_slli_epi32(vec1d->avx512f, 24), 24), _mm512_srli_epi32(_mm512_slli_epi32(vec2d->avx512f, 24), 24)); \
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41 __m512i dst_2 = _mm512_##op##_epi32(_mm512_srli_epi32(_mm512_slli_epi32(vec1d->avx512f, 16), 24), _mm512_srli_epi32(_mm512_slli_epi32(vec2d->avx512f, 16), 24)); \
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42 __m512i dst_3 = _mm512_##op##_epi32(_mm512_srli_epi32(_mm512_slli_epi32(vec1d->avx512f, 8), 24), _mm512_srli_epi32(_mm512_slli_epi32(vec2d->avx512f, 8), 24)); \
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43 __m512i dst_4 = _mm512_##op##_epi32(_mm512_srli_epi32(vec1d->avx512f, 24), _mm512_srli_epi32(vec2d->avx512f, 24)); \
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44 \
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45 /* repack */ \
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46 vec1d->avx512f = _mm512_or_si512( \
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47 _mm512_or_si512( \
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48 _mm512_srli_epi32(_mm512_slli_epi32(dst_1, 24), 24), \
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49 _mm512_srli_epi32(_mm512_slli_epi32(dst_2, 24), 16) \
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50 ), \
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51 _mm512_or_si512( \
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52 _mm512_srli_epi32(_mm512_slli_epi32(dst_3, 24), 8), \
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53 _mm512_slli_epi32(dst_4, 24) \
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54 ) \
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55 ); \
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56 \
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57 return vec1d->vec; \
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58 } while (0)
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59
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60 #define VEC_AVX512F_OPERATION_16x32(op, sign) \
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61 do { \
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62 union v##sign##int16x32_impl_data *vec1d = (union v##sign##int16x32_impl_data *)&vec1; \
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63 union v##sign##int16x32_impl_data *vec2d = (union v##sign##int16x32_impl_data *)&vec2; \
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64 \
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65 /* unpack and operate; it would be nice if we had an _m512_andi_epi32... */ \
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66 __m512i dst_1 = _mm512_##op##_epi32(_mm512_srli_epi32(_mm512_slli_epi32(vec1d->avx512f, 16), 16), _mm512_srli_epi32(_mm512_slli_epi32(vec2d->avx512f, 16), 16)); \
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67 __m512i dst_2 = _mm512_##op##_epi32(_mm512_srli_epi32(vec1d->avx512f, 16), _mm512_srli_epi32(vec2d->avx512f, 16)); \
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68 \
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69 /* repack */ \
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70 vec1d->avx512f = _mm512_or_si512( \
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71 _mm512_srli_epi32(_mm512_slli_epi32(dst_1, 16), 16), \
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72 _mm512_slli_epi32(dst_2, 16) \
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73 ); \
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74 return vec1d->vec; \
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75 } while (0)
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76
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77 #define VEC_AVX512F_ADD_8x64(sign) \
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78 VEC_AVX512F_OPERATION_8x64(add, sign)
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79
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80 #define VEC_AVX512F_ADD_16x32(sign) \
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81 VEC_AVX512F_OPERATION_16x32(add, sign)
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82
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83 #define VEC_AVX512F_ADD_32x16(sign) \
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84 do { \
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85 union v##sign##int32x16_impl_data *vec1d = (union v##sign##int32x16_impl_data *)&vec1; \
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86 union v##sign##int32x16_impl_data *vec2d = (union v##sign##int32x16_impl_data *)&vec2; \
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87 \
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88 vec1d->avx512f = _mm512_add_epi32(vec1d->avx512f, vec2d->avx512f); \
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89 return vec1d->vec; \
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90 } while (0)
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91
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92 #define VEC_AVX512F_ADD_64x8(sign) \
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93 do { \
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94 union v##sign##int64x8_impl_data *vec1d = (union v##sign##int64x8_impl_data *)&vec1; \
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95 union v##sign##int64x8_impl_data *vec2d = (union v##sign##int64x8_impl_data *)&vec2; \
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96 \
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97 vec1d->avx512f = _mm512_add_epi64(vec1d->avx512f, vec2d->avx512f); \
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98 return vec1d->vec; \
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99 } while (0)
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100
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101 #define VEC_AVX512F_SUB_8x64(sign) \
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102 VEC_AVX512F_OPERATION_8x64(sub, sign)
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103
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104 #define VEC_AVX512F_SUB_16x32(sign) \
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105 VEC_AVX512F_OPERATION_16x32(sub, sign)
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106
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107 #define VEC_AVX512F_SUB_32x16(sign) \
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108 do { \
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109 union v##sign##int32x16_impl_data *vec1d = (union v##sign##int32x16_impl_data *)&vec1; \
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110 union v##sign##int32x16_impl_data *vec2d = (union v##sign##int32x16_impl_data *)&vec2; \
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111 \
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112 vec1d->avx512f = _mm512_sub_epi32(vec1d->avx512f, vec2d->avx512f); \
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113 return vec1d->vec; \
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114 } while (0)
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115
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116 #define VEC_AVX512F_SUB_64x8(sign) \
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117 do { \
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118 union v##sign##int64x8_impl_data *vec1d = (union v##sign##int64x8_impl_data *)&vec1; \
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119 union v##sign##int64x8_impl_data *vec2d = (union v##sign##int64x8_impl_data *)&vec2; \
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120 \
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121 vec1d->avx512f = _mm512_sub_epi64(vec1d->avx512f, vec2d->avx512f); \
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122 return vec1d->vec; \
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123 } while (0)
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124
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125 #define VEC_AVX512F_MUL_8x64(sign) \
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126 VEC_AVX512F_OPERATION_8x64(mullo, sign)
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127
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128 #define VEC_AVX512F_MUL_16x32(sign) \
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129 VEC_AVX512F_OPERATION_16x32(mullo, sign)
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Paper <paper@tflc.us>
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130
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Paper <paper@tflc.us>
parents:
diff changeset
131 #define VEC_AVX512F_MUL_32x16(sign) \
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Paper <paper@tflc.us>
parents:
diff changeset
132 do { \
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Paper <paper@tflc.us>
parents:
diff changeset
133 union v##sign##int32x16_impl_data *vec1d = (union v##sign##int32x16_impl_data *)&vec1; \
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Paper <paper@tflc.us>
parents:
diff changeset
134 union v##sign##int32x16_impl_data *vec2d = (union v##sign##int32x16_impl_data *)&vec2; \
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Paper <paper@tflc.us>
parents:
diff changeset
135 \
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Paper <paper@tflc.us>
parents:
diff changeset
136 vec1d->avx512f = _mm512_mullo_epi32(vec1d->avx512f, vec2d->avx512f); \
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Paper <paper@tflc.us>
parents:
diff changeset
137 return vec1d->vec; \
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Paper <paper@tflc.us>
parents:
diff changeset
138 } while (0)
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Paper <paper@tflc.us>
parents:
diff changeset
139
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Paper <paper@tflc.us>
parents:
diff changeset
140 #define VEC_AVX512F_MUL_64x8(sign) \
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Paper <paper@tflc.us>
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diff changeset
141 do { \
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Paper <paper@tflc.us>
parents:
diff changeset
142 union v##sign##int64x8_impl_data *vec1d = (union v##sign##int64x8_impl_data *)&vec1; \
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Paper <paper@tflc.us>
parents:
diff changeset
143 union v##sign##int64x8_impl_data *vec2d = (union v##sign##int64x8_impl_data *)&vec2; \
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Paper <paper@tflc.us>
parents:
diff changeset
144 \
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Paper <paper@tflc.us>
parents:
diff changeset
145 __m512i ac = _mm512_mul_epu32(vec1d->avx512f, vec2d->avx512f); \
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Paper <paper@tflc.us>
parents:
diff changeset
146 __m512i b = _mm512_srli_epi64(vec1d->avx512f, 32); \
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Paper <paper@tflc.us>
parents:
diff changeset
147 __m512i bc = _mm512_mul_epu32(b, vec2d->avx512f); \
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Paper <paper@tflc.us>
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diff changeset
148 __m512i d = _mm512_srli_epi64(vec2d->avx512f, 32); \
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Paper <paper@tflc.us>
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diff changeset
149 __m512i ad = _mm512_mul_epu32(vec1d->avx512f, d); \
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Paper <paper@tflc.us>
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150 __m512i hi = _mm512_add_epi64(bc, ad); \
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Paper <paper@tflc.us>
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151 hi = _mm512_slli_epi64(hi, 32); \
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Paper <paper@tflc.us>
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152 \
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Paper <paper@tflc.us>
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153 vec1d->avx512f = _mm512_add_epi64(hi, ac); \
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Paper <paper@tflc.us>
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154 return vec1d->vec; \
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Paper <paper@tflc.us>
parents:
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155 } while (0)
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Paper <paper@tflc.us>
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156
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Paper <paper@tflc.us>
parents:
diff changeset
157 #define VEC_AVX512F_LSHIFT_8x64(sign) \
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Paper <paper@tflc.us>
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158 VEC_AVX512F_OPERATION_8x64(sllv, sign)
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Paper <paper@tflc.us>
parents:
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159
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Paper <paper@tflc.us>
parents:
diff changeset
160 #define VEC_AVX512F_LSHIFT_16x32(sign) \
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Paper <paper@tflc.us>
parents:
diff changeset
161 VEC_AVX512F_OPERATION_16x32(sllv, sign)
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Paper <paper@tflc.us>
parents:
diff changeset
162
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Paper <paper@tflc.us>
parents:
diff changeset
163 #define VEC_AVX512F_LSHIFT_32x16(sign) \
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Paper <paper@tflc.us>
parents:
diff changeset
164 do { \
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Paper <paper@tflc.us>
parents:
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165 union v##sign##int32x16_impl_data *vec1d = (union v##sign##int32x16_impl_data *)&vec1; \
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Paper <paper@tflc.us>
parents:
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166 union v##sign##int32x16_impl_data *vec2d = (union v##sign##int32x16_impl_data *)&vec2; \
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Paper <paper@tflc.us>
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167 \
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Paper <paper@tflc.us>
parents:
diff changeset
168 vec1d->avx512f = _mm512_sllv_epi32(vec1d->avx512f, vec2d->avx512f); \
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Paper <paper@tflc.us>
parents:
diff changeset
169 return vec1d->vec; \
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Paper <paper@tflc.us>
parents:
diff changeset
170 } while (0)
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Paper <paper@tflc.us>
parents:
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171
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Paper <paper@tflc.us>
parents:
diff changeset
172 #define VEC_AVX512F_LSHIFT_64x8(sign) \
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Paper <paper@tflc.us>
parents:
diff changeset
173 do { \
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Paper <paper@tflc.us>
parents:
diff changeset
174 union v##sign##int64x8_impl_data *vec1d = (union v##sign##int64x8_impl_data *)&vec1; \
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Paper <paper@tflc.us>
parents:
diff changeset
175 union v##sign##int64x8_impl_data *vec2d = (union v##sign##int64x8_impl_data *)&vec2; \
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Paper <paper@tflc.us>
parents:
diff changeset
176 \
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Paper <paper@tflc.us>
parents:
diff changeset
177 vec1d->avx512f = _mm512_sllv_epi64(vec1d->avx512f, vec2d->avx512f); \
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Paper <paper@tflc.us>
parents:
diff changeset
178 return vec1d->vec; \
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Paper <paper@tflc.us>
parents:
diff changeset
179 } while (0)
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Paper <paper@tflc.us>
parents:
diff changeset
180
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Paper <paper@tflc.us>
parents:
diff changeset
181 #define VEC_AVX512F_lRSHIFT_8x64(sign) \
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Paper <paper@tflc.us>
parents:
diff changeset
182 VEC_AVX512F_OPERATION_8x64(srlv, sign)
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Paper <paper@tflc.us>
parents:
diff changeset
183
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Paper <paper@tflc.us>
parents:
diff changeset
184 #define VEC_AVX512F_lRSHIFT_16x32(sign) \
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Paper <paper@tflc.us>
parents:
diff changeset
185 VEC_AVX512F_OPERATION_16x32(srlv, sign)
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Paper <paper@tflc.us>
parents:
diff changeset
186
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Paper <paper@tflc.us>
parents:
diff changeset
187 #define VEC_AVX512F_aRSHIFT_8x64(sign) \
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Paper <paper@tflc.us>
parents:
diff changeset
188 do { \
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Paper <paper@tflc.us>
parents:
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189 return v##sign##int8x64_generic_rshift(vec1, vec2); \
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Paper <paper@tflc.us>
parents:
diff changeset
190 } while (0)
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Paper <paper@tflc.us>
parents:
diff changeset
191
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Paper <paper@tflc.us>
parents:
diff changeset
192 #define VEC_AVX512F_aRSHIFT_16x32(sign) \
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Paper <paper@tflc.us>
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diff changeset
193 do { \
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Paper <paper@tflc.us>
parents:
diff changeset
194 return v##sign##int16x32_generic_rshift(vec1, vec2); \
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Paper <paper@tflc.us>
parents:
diff changeset
195 } while (0)
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Paper <paper@tflc.us>
parents:
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196
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Paper <paper@tflc.us>
parents:
diff changeset
197 #define VEC_AVX512F_RSHIFT_8x64(sign, aORl) VEC_AVX512F_##aORl##RSHIFT_8x64(sign)
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Paper <paper@tflc.us>
parents:
diff changeset
198 #define VEC_AVX512F_RSHIFT_16x32(sign, aORl) VEC_AVX512F_##aORl##RSHIFT_16x32(sign)
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Paper <paper@tflc.us>
parents:
diff changeset
199
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Paper <paper@tflc.us>
parents:
diff changeset
200 #define VEC_AVX512F_RSHIFT_32x16(sign, aORl) \
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Paper <paper@tflc.us>
parents:
diff changeset
201 do { \
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Paper <paper@tflc.us>
parents:
diff changeset
202 union v##sign##int32x16_impl_data *vec1d = (union v##sign##int32x16_impl_data *)&vec1; \
e26874655738 *: huge refactor, new major release (hahaha)
Paper <paper@tflc.us>
parents:
diff changeset
203 union v##sign##int32x16_impl_data *vec2d = (union v##sign##int32x16_impl_data *)&vec2; \
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Paper <paper@tflc.us>
parents:
diff changeset
204 \
e26874655738 *: huge refactor, new major release (hahaha)
Paper <paper@tflc.us>
parents:
diff changeset
205 vec1d->avx512f = _mm512_sr##aORl##v_epi32(vec1d->avx512f, vec2d->avx512f); \
e26874655738 *: huge refactor, new major release (hahaha)
Paper <paper@tflc.us>
parents:
diff changeset
206 return vec1d->vec; \
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Paper <paper@tflc.us>
parents:
diff changeset
207 } while (0)
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Paper <paper@tflc.us>
parents:
diff changeset
208
e26874655738 *: huge refactor, new major release (hahaha)
Paper <paper@tflc.us>
parents:
diff changeset
209 #define VEC_AVX512F_RSHIFT_64x8(sign, aORl) \
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Paper <paper@tflc.us>
parents:
diff changeset
210 do { \
e26874655738 *: huge refactor, new major release (hahaha)
Paper <paper@tflc.us>
parents:
diff changeset
211 union v##sign##int64x8_impl_data *vec1d = (union v##sign##int64x8_impl_data *)&vec1; \
e26874655738 *: huge refactor, new major release (hahaha)
Paper <paper@tflc.us>
parents:
diff changeset
212 union v##sign##int64x8_impl_data *vec2d = (union v##sign##int64x8_impl_data *)&vec2; \
e26874655738 *: huge refactor, new major release (hahaha)
Paper <paper@tflc.us>
parents:
diff changeset
213 \
e26874655738 *: huge refactor, new major release (hahaha)
Paper <paper@tflc.us>
parents:
diff changeset
214 vec1d->avx512f = _mm512_sr##aORl##v_epi64(vec1d->avx512f, vec2d->avx512f); \
e26874655738 *: huge refactor, new major release (hahaha)
Paper <paper@tflc.us>
parents:
diff changeset
215 return vec1d->vec; \
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Paper <paper@tflc.us>
parents:
diff changeset
216 } while (0)
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Paper <paper@tflc.us>
parents:
diff changeset
217
e26874655738 *: huge refactor, new major release (hahaha)
Paper <paper@tflc.us>
parents:
diff changeset
218 #define VEC_AVX512F_uRSHIFT_8x64(sign, aORl) VEC_AVX512F_RSHIFT_8x64(sign, l)
e26874655738 *: huge refactor, new major release (hahaha)
Paper <paper@tflc.us>
parents:
diff changeset
219 #define VEC_AVX512F_uRSHIFT_16x32(sign, aORl) VEC_AVX512F_RSHIFT_16x32(sign, l)
e26874655738 *: huge refactor, new major release (hahaha)
Paper <paper@tflc.us>
parents:
diff changeset
220 #define VEC_AVX512F_uRSHIFT_32x16(sign, aORl) VEC_AVX512F_RSHIFT_32x16(sign, l)
e26874655738 *: huge refactor, new major release (hahaha)
Paper <paper@tflc.us>
parents:
diff changeset
221 #define VEC_AVX512F_uRSHIFT_64x8(sign, aORl) VEC_AVX512F_RSHIFT_64x8(sign, l)
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Paper <paper@tflc.us>
parents:
diff changeset
222
e26874655738 *: huge refactor, new major release (hahaha)
Paper <paper@tflc.us>
parents:
diff changeset
223 #define VEC_AVX512F_DEFINE_OPERATIONS_SIGN(sign, bits, size) \
e26874655738 *: huge refactor, new major release (hahaha)
Paper <paper@tflc.us>
parents:
diff changeset
224 union v##sign##int##bits##x##size##_impl_data { \
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Paper <paper@tflc.us>
parents:
diff changeset
225 v##sign##int##bits##x##size vec; \
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Paper <paper@tflc.us>
parents:
diff changeset
226 __m512i avx512f; \
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Paper <paper@tflc.us>
parents:
diff changeset
227 }; \
e26874655738 *: huge refactor, new major release (hahaha)
Paper <paper@tflc.us>
parents:
diff changeset
228 \
24
e49e70f7012f impl/x86: add static assertions for alignment and size
Paper <paper@tflc.us>
parents: 23
diff changeset
229 VEC_STATIC_ASSERT(VEC_ALIGNOF(__m512i) <= VEC_ALIGNOF(v##sign##int##bits##x##size), "vec: v" #sign "int" #bits "x" #size " alignment needs to be expanded to fit intrinsic type size"); \
e49e70f7012f impl/x86: add static assertions for alignment and size
Paper <paper@tflc.us>
parents: 23
diff changeset
230 VEC_STATIC_ASSERT(sizeof(__m512i) <= sizeof(v##sign##int##bits##x##size), "vec: v" #sign "int" #bits "x" #size " needs to be expanded to fit intrinsic type size"); \
e49e70f7012f impl/x86: add static assertions for alignment and size
Paper <paper@tflc.us>
parents: 23
diff changeset
231 \
23
e26874655738 *: huge refactor, new major release (hahaha)
Paper <paper@tflc.us>
parents:
diff changeset
232 static v##sign##int##bits##x##size v##sign##int##bits##x##size##_avx512f_load_aligned(const vec_##sign##int##bits in[size]) \
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Paper <paper@tflc.us>
parents:
diff changeset
233 { \
e26874655738 *: huge refactor, new major release (hahaha)
Paper <paper@tflc.us>
parents:
diff changeset
234 union v##sign##int##bits##x##size##_impl_data vec; \
e26874655738 *: huge refactor, new major release (hahaha)
Paper <paper@tflc.us>
parents:
diff changeset
235 vec.avx512f = _mm512_load_si512((const __m512i *)in); \
e26874655738 *: huge refactor, new major release (hahaha)
Paper <paper@tflc.us>
parents:
diff changeset
236 return vec.vec; \
e26874655738 *: huge refactor, new major release (hahaha)
Paper <paper@tflc.us>
parents:
diff changeset
237 } \
e26874655738 *: huge refactor, new major release (hahaha)
Paper <paper@tflc.us>
parents:
diff changeset
238 \
e26874655738 *: huge refactor, new major release (hahaha)
Paper <paper@tflc.us>
parents:
diff changeset
239 static v##sign##int##bits##x##size v##sign##int##bits##x##size##_avx512f_load(const vec_##sign##int##bits in[size]) \
e26874655738 *: huge refactor, new major release (hahaha)
Paper <paper@tflc.us>
parents:
diff changeset
240 { \
e26874655738 *: huge refactor, new major release (hahaha)
Paper <paper@tflc.us>
parents:
diff changeset
241 union v##sign##int##bits##x##size##_impl_data vec; \
e26874655738 *: huge refactor, new major release (hahaha)
Paper <paper@tflc.us>
parents:
diff changeset
242 vec.avx512f = _mm512_loadu_si512((const __m512i *)in); \
e26874655738 *: huge refactor, new major release (hahaha)
Paper <paper@tflc.us>
parents:
diff changeset
243 return vec.vec; \
e26874655738 *: huge refactor, new major release (hahaha)
Paper <paper@tflc.us>
parents:
diff changeset
244 } \
e26874655738 *: huge refactor, new major release (hahaha)
Paper <paper@tflc.us>
parents:
diff changeset
245 \
e26874655738 *: huge refactor, new major release (hahaha)
Paper <paper@tflc.us>
parents:
diff changeset
246 static void v##sign##int##bits##x##size##_avx512f_store_aligned(v##sign##int##bits##x##size vec, vec_##sign##int##bits out[size]) \
e26874655738 *: huge refactor, new major release (hahaha)
Paper <paper@tflc.us>
parents:
diff changeset
247 { \
e26874655738 *: huge refactor, new major release (hahaha)
Paper <paper@tflc.us>
parents:
diff changeset
248 _mm512_store_si512((__m512i *)out, ((union v##sign##int##bits##x##size##_impl_data *)&vec)->avx512f); \
e26874655738 *: huge refactor, new major release (hahaha)
Paper <paper@tflc.us>
parents:
diff changeset
249 } \
e26874655738 *: huge refactor, new major release (hahaha)
Paper <paper@tflc.us>
parents:
diff changeset
250 \
e26874655738 *: huge refactor, new major release (hahaha)
Paper <paper@tflc.us>
parents:
diff changeset
251 static void v##sign##int##bits##x##size##_avx512f_store(v##sign##int##bits##x##size vec, vec_##sign##int##bits out[size]) \
e26874655738 *: huge refactor, new major release (hahaha)
Paper <paper@tflc.us>
parents:
diff changeset
252 { \
e26874655738 *: huge refactor, new major release (hahaha)
Paper <paper@tflc.us>
parents:
diff changeset
253 _mm512_storeu_si512((__m512i *)out, ((union v##sign##int##bits##x##size##_impl_data *)&vec)->avx512f); \
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Paper <paper@tflc.us>
parents:
diff changeset
254 } \
e26874655738 *: huge refactor, new major release (hahaha)
Paper <paper@tflc.us>
parents:
diff changeset
255 \
e26874655738 *: huge refactor, new major release (hahaha)
Paper <paper@tflc.us>
parents:
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256 static v##sign##int##bits##x##size v##sign##int##bits##x##size##_avx512f_add(v##sign##int##bits##x##size vec1, v##sign##int##bits##x##size vec2) \
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257 { \
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258 VEC_AVX512F_ADD_##bits##x##size(sign); \
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259 } \
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260 \
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261 static v##sign##int##bits##x##size v##sign##int##bits##x##size##_avx512f_sub(v##sign##int##bits##x##size vec1, v##sign##int##bits##x##size vec2) \
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262 { \
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263 VEC_AVX512F_SUB_##bits##x##size(sign); \
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264 } \
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265 \
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266 static v##sign##int##bits##x##size v##sign##int##bits##x##size##_avx512f_mul(v##sign##int##bits##x##size vec1, v##sign##int##bits##x##size vec2) \
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267 { \
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268 VEC_AVX512F_MUL_##bits##x##size(sign); \
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269 } \
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270 \
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271 static v##sign##int##bits##x##size v##sign##int##bits##x##size##_avx512f_and(v##sign##int##bits##x##size vec1, v##sign##int##bits##x##size vec2) \
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272 { \
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273 union v##sign##int##bits##x##size##_impl_data *vec1d = (union v##sign##int##bits##x##size##_impl_data *)&vec1; \
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274 union v##sign##int##bits##x##size##_impl_data *vec2d = (union v##sign##int##bits##x##size##_impl_data *)&vec2; \
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275 \
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276 vec1d->avx512f = _mm512_and_si512(vec1d->avx512f, vec2d->avx512f); \
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277 return vec1d->vec; \
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278 } \
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279 \
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280 static v##sign##int##bits##x##size v##sign##int##bits##x##size##_avx512f_or(v##sign##int##bits##x##size vec1, v##sign##int##bits##x##size vec2) \
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281 { \
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282 union v##sign##int##bits##x##size##_impl_data *vec1d = (union v##sign##int##bits##x##size##_impl_data *)&vec1; \
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283 union v##sign##int##bits##x##size##_impl_data *vec2d = (union v##sign##int##bits##x##size##_impl_data *)&vec2; \
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284 \
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285 vec1d->avx512f = _mm512_or_si512(vec1d->avx512f, vec2d->avx512f); \
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286 return vec1d->vec; \
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287 } \
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288 \
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289 static v##sign##int##bits##x##size v##sign##int##bits##x##size##_avx512f_xor(v##sign##int##bits##x##size vec1, v##sign##int##bits##x##size vec2) \
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290 { \
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291 union v##sign##int##bits##x##size##_impl_data *vec1d = (union v##sign##int##bits##x##size##_impl_data *)&vec1; \
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292 union v##sign##int##bits##x##size##_impl_data *vec2d = (union v##sign##int##bits##x##size##_impl_data *)&vec2; \
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293 \
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294 vec1d->avx512f = _mm512_xor_si512(vec1d->avx512f, vec2d->avx512f); \
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295 return vec1d->vec; \
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296 } \
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297 \
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298 static v##sign##int##bits##x##size v##sign##int##bits##x##size##_avx512f_lshift(v##sign##int##bits##x##size vec1, vuint##bits##x##size vec2) \
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299 { \
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300 VEC_AVX512F_LSHIFT_##bits##x##size(sign); \
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301 } \
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302 \
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303 static v##sign##int##bits##x##size v##sign##int##bits##x##size##_avx512f_rshift(v##sign##int##bits##x##size vec1, vuint##bits##x##size vec2) \
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304 { \
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305 VEC_AVX512F_##sign##RSHIFT_##bits##x##size(sign, a); \
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306 } \
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307 \
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308 static v##sign##int##bits##x##size v##sign##int##bits##x##size##_avx512f_lrshift(v##sign##int##bits##x##size vec1, vuint##bits##x##size vec2) \
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309 { \
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310 VEC_AVX512F_RSHIFT_##bits##x##size(sign, l); \
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311 } \
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312 \
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313 const v##sign##int##bits##x##size##_impl v##sign##int##bits##x##size##_impl_avx512f = { \
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314 v##sign##int##bits##x##size##_generic_splat, \
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315 v##sign##int##bits##x##size##_avx512f_load_aligned, \
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316 v##sign##int##bits##x##size##_avx512f_load, \
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317 v##sign##int##bits##x##size##_avx512f_store_aligned, \
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318 v##sign##int##bits##x##size##_avx512f_store, \
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319 v##sign##int##bits##x##size##_avx512f_add, \
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Paper <paper@tflc.us>
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320 v##sign##int##bits##x##size##_avx512f_sub, \
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321 v##sign##int##bits##x##size##_avx512f_mul, \
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Paper <paper@tflc.us>
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322 v##sign##int##bits##x##size##_generic_div, \
e26874655738 *: huge refactor, new major release (hahaha)
Paper <paper@tflc.us>
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323 v##sign##int##bits##x##size##_generic_avg, \
e26874655738 *: huge refactor, new major release (hahaha)
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324 v##sign##int##bits##x##size##_avx512f_and, \
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325 v##sign##int##bits##x##size##_avx512f_or, \
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326 v##sign##int##bits##x##size##_avx512f_xor, \
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327 v##sign##int##bits##x##size##_generic_not, \
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328 v##sign##int##bits##x##size##_avx512f_lshift, \
e26874655738 *: huge refactor, new major release (hahaha)
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329 v##sign##int##bits##x##size##_avx512f_rshift, \
e26874655738 *: huge refactor, new major release (hahaha)
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330 v##sign##int##bits##x##size##_avx512f_lrshift, \
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331 v##sign##int##bits##x##size##_generic_cmplt, \
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332 v##sign##int##bits##x##size##_generic_cmple, \
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333 v##sign##int##bits##x##size##_generic_cmpeq, \
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334 v##sign##int##bits##x##size##_generic_cmpge, \
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335 v##sign##int##bits##x##size##_generic_cmpgt, \
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336 };
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337
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338 #define VEC_AVX512F_DEFINE_OPERATIONS(bits, size) \
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339 VEC_AVX512F_DEFINE_OPERATIONS_SIGN(u, bits, size) \
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340 VEC_AVX512F_DEFINE_OPERATIONS_SIGN( , bits, size)
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341
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342 VEC_AVX512F_DEFINE_OPERATIONS(8, 64)
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343 VEC_AVX512F_DEFINE_OPERATIONS(16, 32)
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344 VEC_AVX512F_DEFINE_OPERATIONS(32, 16)
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345 VEC_AVX512F_DEFINE_OPERATIONS(64, 8)