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impl/arm/neon: it compiles again, but is untested
author Paper <paper@tflc.us>
date Mon, 25 Nov 2024 00:33:02 -0500
parents e49e70f7012f
children
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23
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1 /**
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2 * vec - a tiny SIMD vector library in C99
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3 *
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4 * Copyright (c) 2024 Paper
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5 *
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6 * Permission is hereby granted, free of charge, to any person obtaining a copy
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7 * of this software and associated documentation files (the "Software"), to deal
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8 * in the Software without restriction, including without limitation the rights
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9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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10 * copies of the Software, and to permit persons to whom the Software is
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11 * furnished to do so, subject to the following conditions:
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12 *
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13 * The above copyright notice and this permission notice shall be included in all
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14 * copies or substantial portions of the Software.
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15 *
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16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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19 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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22 * SOFTWARE.
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23 **/
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24
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25 #include "vec/vec.h"
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26 #include "vec/impl/x86/mmx.h"
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27 #include "vec/impl/generic.h"
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28
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29 #include <mmintrin.h>
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30 #include <string.h>
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31
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32 #define VEC_MMX_OPERATION_8x8(op, sign) \
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33 do { \
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34 /* unpack and multiply */ \
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35 union v##sign##int8x8_impl_data *vec1d = (union v##sign##int8x8_impl_data *)&vec1; \
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36 union v##sign##int8x8_impl_data *vec2d = (union v##sign##int8x8_impl_data *)&vec2; \
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37 \
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38 __m64 dst_even = _mm_##op##_pi16(vec1d->mmx, vec2d->mmx); \
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39 __m64 dst_odd = _mm_##op##_pi16(_mm_srli_pi16(vec1d->mmx, 8), _mm_srli_pi16(vec2d->mmx, 8)); \
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40 \
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41 /* repack */ \
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42 vec1d->mmx = _mm_or_si64( \
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43 _mm_slli_pi16(dst_odd, 8), \
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44 _mm_srli_pi16(_mm_slli_pi16(dst_even, 8), 8) \
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45 ); \
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46 return vec1d->vec; \
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47 } while (0)
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48
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49 // shared between MMX variations
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50 #define VEC_MMX_MUL_8x8(sign) \
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51 VEC_MMX_OPERATION_8x8(mullo, sign)
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52
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53 #define VEC_MMX_MUL_16x4(sign) \
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54 do { \
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55 union v##sign##int16x4_impl_data *vec1d = (union v##sign##int16x4_impl_data *)&vec1; \
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56 union vuint16x4_impl_data *vec2d = (union vuint16x4_impl_data *)&vec2; \
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57 \
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58 vec1d->mmx = _mm_mullo_pi16(vec1d->mmx, vec2d->mmx); \
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59 return vec1d->vec; \
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60 } while (0)
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61
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62 #define VEC_MMX_MUL_32x2(sign) \
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63 /* TODO implement this for real */ \
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64 do { \
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65 return v##sign##int32x2_generic_mul(vec1, vec2); \
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66 } while (0)
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67
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68 #define VEC_MMX_DEFINE_OPERATIONS_SIGN(sign, bits, size) \
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69 union v##sign##int##bits##x##size##_impl_data { \
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70 v##sign##int##bits##x##size vec; \
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71 __m64 mmx; \
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72 }; \
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73 \
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74 VEC_STATIC_ASSERT(VEC_ALIGNOF(__m64) <= VEC_ALIGNOF(v##sign##int##bits##x##size), "vec: v" #sign "int" #bits "x" #size " alignment needs to be expanded to fit intrinsic type size"); \
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75 VEC_STATIC_ASSERT(sizeof(__m64) <= sizeof(v##sign##int##bits##x##size), "vec: v" #sign "int" #bits "x" #size " needs to be expanded to fit intrinsic type size"); \
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76 \
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77 static v##sign##int##bits##x##size v##sign##int##bits##x##size##_mmx_load_aligned(const vec_##sign##int##bits in[size]) \
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78 { \
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79 v##sign##int##bits##x##size vec; \
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80 memcpy(&vec, in, sizeof(vec)); \
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81 return vec; \
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82 } \
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83 \
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84 static void v##sign##int##bits##x##size##_mmx_store_aligned(v##sign##int##bits##x##size vec, vec_##sign##int##bits out[size]) \
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85 { \
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86 memcpy(out, &vec, sizeof(vec)); \
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87 } \
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88 \
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89 static v##sign##int##bits##x##size v##sign##int##bits##x##size##_mmx_add(v##sign##int##bits##x##size vec1, v##sign##int##bits##x##size vec2) \
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90 { \
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91 union v##sign##int##bits##x##size##_impl_data *vec1d = (union v##sign##int##bits##x##size##_impl_data *)&vec1; \
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92 union v##sign##int##bits##x##size##_impl_data *vec2d = (union v##sign##int##bits##x##size##_impl_data *)&vec2; \
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93 \
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94 vec1d->mmx = _mm_add_pi##bits(vec1d->mmx, vec2d->mmx); \
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95 \
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96 return vec1d->vec; \
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97 } \
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98 \
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99 static v##sign##int##bits##x##size v##sign##int##bits##x##size##_mmx_sub(v##sign##int##bits##x##size vec1, v##sign##int##bits##x##size vec2) \
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100 { \
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101 union v##sign##int##bits##x##size##_impl_data *vec1d = (union v##sign##int##bits##x##size##_impl_data *)&vec1; \
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102 union v##sign##int##bits##x##size##_impl_data *vec2d = (union v##sign##int##bits##x##size##_impl_data *)&vec2; \
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103 \
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104 vec1d->mmx = _mm_sub_pi##bits(vec1d->mmx, vec2d->mmx); \
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105 \
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106 return vec1d->vec; \
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107 } \
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108 \
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109 static v##sign##int##bits##x##size v##sign##int##bits##x##size##_mmx_mul(v##sign##int##bits##x##size vec1, v##sign##int##bits##x##size vec2) \
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110 { \
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111 VEC_MMX_MUL_##bits##x##size(sign); \
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112 } \
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113 \
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114 static v##sign##int##bits##x##size v##sign##int##bits##x##size##_mmx_and(v##sign##int##bits##x##size vec1, v##sign##int##bits##x##size vec2) \
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115 { \
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116 union v##sign##int##bits##x##size##_impl_data *vec1d = (union v##sign##int##bits##x##size##_impl_data *)&vec1; \
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117 union v##sign##int##bits##x##size##_impl_data *vec2d = (union v##sign##int##bits##x##size##_impl_data *)&vec2; \
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118 \
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119 vec1d->mmx = _mm_and_si64(vec1d->mmx, vec2d->mmx); \
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120 \
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121 return vec1d->vec; \
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122 } \
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123 \
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124 static v##sign##int##bits##x##size v##sign##int##bits##x##size##_mmx_or(v##sign##int##bits##x##size vec1, v##sign##int##bits##x##size vec2) \
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125 { \
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126 union v##sign##int##bits##x##size##_impl_data *vec1d = (union v##sign##int##bits##x##size##_impl_data *)&vec1; \
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127 union v##sign##int##bits##x##size##_impl_data *vec2d = (union v##sign##int##bits##x##size##_impl_data *)&vec2; \
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128 \
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129 vec1d->mmx = _mm_or_si64(vec1d->mmx, vec2d->mmx); \
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130 \
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131 return vec1d->vec; \
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132 } \
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133 \
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134 static v##sign##int##bits##x##size v##sign##int##bits##x##size##_mmx_xor(v##sign##int##bits##x##size vec1, v##sign##int##bits##x##size vec2) \
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135 { \
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136 union v##sign##int##bits##x##size##_impl_data *vec1d = (union v##sign##int##bits##x##size##_impl_data *)&vec1; \
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137 union v##sign##int##bits##x##size##_impl_data *vec2d = (union v##sign##int##bits##x##size##_impl_data *)&vec2; \
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138 \
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139 vec1d->mmx = _mm_xor_si64(vec1d->mmx, vec2d->mmx); \
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140 \
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141 return vec1d->vec; \
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142 } \
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143 \
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144 const v##sign##int##bits##x##size##_impl v##sign##int##bits##x##size##_impl_mmx = { \
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145 v##sign##int##bits##x##size##_generic_splat, \
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146 v##sign##int##bits##x##size##_mmx_load_aligned, \
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147 v##sign##int##bits##x##size##_mmx_load_aligned, \
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148 v##sign##int##bits##x##size##_mmx_store_aligned, \
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149 v##sign##int##bits##x##size##_mmx_store_aligned, \
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150 v##sign##int##bits##x##size##_mmx_add, \
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151 v##sign##int##bits##x##size##_mmx_sub, \
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152 v##sign##int##bits##x##size##_mmx_mul, \
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153 v##sign##int##bits##x##size##_generic_div, \
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154 v##sign##int##bits##x##size##_generic_avg, \
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155 v##sign##int##bits##x##size##_mmx_and, \
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156 v##sign##int##bits##x##size##_mmx_or, \
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157 v##sign##int##bits##x##size##_mmx_xor, \
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158 v##sign##int##bits##x##size##_generic_not, \
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159 v##sign##int##bits##x##size##_generic_lshift, \
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160 v##sign##int##bits##x##size##_generic_rshift, \
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161 v##sign##int##bits##x##size##_generic_lrshift, \
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162 v##sign##int##bits##x##size##_generic_cmplt, \
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163 v##sign##int##bits##x##size##_generic_cmple, \
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164 v##sign##int##bits##x##size##_generic_cmpeq, \
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165 v##sign##int##bits##x##size##_generic_cmpge, \
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166 v##sign##int##bits##x##size##_generic_cmpgt, \
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167 };
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168
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169 #define VEC_MMX_DEFINE_OPERATIONS(bits, size) \
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170 VEC_MMX_DEFINE_OPERATIONS_SIGN(u, bits, size) \
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171 VEC_MMX_DEFINE_OPERATIONS_SIGN( , bits, size)
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172
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173 VEC_MMX_DEFINE_OPERATIONS(8, 8)
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174 VEC_MMX_DEFINE_OPERATIONS(16, 4)
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175 VEC_MMX_DEFINE_OPERATIONS(32, 2)