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annotate src/impl/x86/sse41.c @ 31:bf6ad516f1e6

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author Paper <paper@tflc.us>
date Fri, 25 Apr 2025 17:40:33 -0400
parents c6c99ab1088a
children 99e4539f922f
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1 /**
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2 * vec - a tiny SIMD vector library in C99
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3 *
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4 * Copyright (c) 2024 Paper
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5 *
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6 * Permission is hereby granted, free of charge, to any person obtaining a copy
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7 * of this software and associated documentation files (the "Software"), to deal
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8 * in the Software without restriction, including without limitation the rights
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9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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10 * copies of the Software, and to permit persons to whom the Software is
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11 * furnished to do so, subject to the following conditions:
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12 *
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13 * The above copyright notice and this permission notice shall be included in all
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14 * copies or substantial portions of the Software.
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15 *
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16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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19 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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22 * SOFTWARE.
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23 **/
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24
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25 #include "vec/impl/x86/sse41.h"
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26 #include "vec/impl/x86/sse2.h"
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27 #include "vec/impl/generic.h"
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28
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29 #include <immintrin.h>
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30
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31 // SSE 4.1 provides a real _mm_mullo_epi32
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32 #define VEC_SSE41_DEFINE_OPERATIONS(sign) \
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33 union v##sign##int32x4_impl_data { \
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34 v##sign##int32x4 vec; \
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35 __m128i sse; \
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36 }; \
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37 \
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38 VEC_STATIC_ASSERT(VEC_ALIGNOF(__m128i) <= VEC_ALIGNOF(v##sign##int32x4), "vec: v" #sign "int32x4 alignment needs to be expanded to fit intrinsic type size"); \
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39 VEC_STATIC_ASSERT(sizeof(__m128i) <= sizeof(v##sign##int32x4), "vec: v" #sign "int32x4 needs to be expanded to fit intrinsic type size"); \
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40 \
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41 static v##sign##int32x4 v##sign##int32x4_sse41_mul(v##sign##int32x4 vec1, v##sign##int32x4 vec2) \
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42 { \
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43 union v##sign##int32x4_impl_data *vec1d = (union v##sign##int32x4_impl_data *)&vec1; \
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44 union v##sign##int32x4_impl_data *vec2d = (union v##sign##int32x4_impl_data *)&vec2; \
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45 \
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46 vec1d->sse = _mm_mullo_epi32(vec1d->sse, vec2d->sse); \
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47 return vec1d->vec; \
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48 } \
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49 \
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50 const v##sign##int32x4_impl v##sign##int32x4_impl_sse41 = { \
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51 v##sign##int32x4_generic_splat, \
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52 v##sign##int32x4_sse2_load_aligned, \
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53 v##sign##int32x4_sse2_load, \
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54 v##sign##int32x4_sse2_store_aligned, \
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55 v##sign##int32x4_sse2_store, \
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56 v##sign##int32x4_sse2_add, \
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57 v##sign##int32x4_sse2_sub, \
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58 v##sign##int32x4_sse41_mul, \
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59 v##sign##int32x4_generic_div, \
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60 v##sign##int32x4_generic_avg, \
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61 v##sign##int32x4_sse2_and, \
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62 v##sign##int32x4_sse2_or, \
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63 v##sign##int32x4_sse2_xor, \
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64 v##sign##int32x4_generic_not, \
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65 v##sign##int32x4_generic_lshift, \
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66 v##sign##int32x4_generic_rshift, \
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67 v##sign##int32x4_generic_lrshift, \
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68 v##sign##int32x4_generic_cmplt, \
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69 v##sign##int32x4_generic_cmple, \
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70 v##sign##int32x4_sse2_cmpeq, \
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71 v##sign##int32x4_generic_cmpge, \
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72 v##sign##int32x4_generic_cmpgt, \
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73 };
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74
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75 VEC_SSE41_DEFINE_OPERATIONS()
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76 VEC_SSE41_DEFINE_OPERATIONS(u)