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annotate src/impl/x86/sse41.c @ 28:c6c99ab1088a

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*: add min/max functions and a big big refactor (again) agh, this time I added a few more implementations (and generally made the code just a little faster...)
author Paper <paper@tflc.us>
date Thu, 24 Apr 2025 00:54:02 -0400
parents e49e70f7012f
children bf6ad516f1e6
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1 /**
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2 * vec - a tiny SIMD vector library in C99
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3 *
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4 * Copyright (c) 2024 Paper
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5 *
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6 * Permission is hereby granted, free of charge, to any person obtaining a copy
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7 * of this software and associated documentation files (the "Software"), to deal
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8 * in the Software without restriction, including without limitation the rights
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9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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10 * copies of the Software, and to permit persons to whom the Software is
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11 * furnished to do so, subject to the following conditions:
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12 *
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13 * The above copyright notice and this permission notice shall be included in all
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14 * copies or substantial portions of the Software.
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15 *
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16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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19 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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22 * SOFTWARE.
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23 **/
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24
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25 #include "vec/impl/x86/sse41.h"
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26 #include "vec/impl/generic.h"
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27
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28 #include <immintrin.h>
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29
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30 /* ------------------------------------------------------------------------ */
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31
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32 #define VEC_SSE41_MINMAX_TEMPLATE(SIGN, BITS, SIZE, INTLSIGN, OP) \
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33 VEC_FUNC_IMPL v##SIGN##int##BITS##x##SIZE v##SIGN##int##BITS##x##SIZE##_sse41_##OP(v##SIGN##int##BITS##x##SIZE vec1, v##SIGN##int##BITS##x##SIZE vec2) \
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34 { \
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35 union v##SIGN##int##BITS##x##SIZE##_impl_data *vec1d = (union v##SIGN##int##BITS##x##SIZE##_impl_data *)&vec1; \
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36 union v##SIGN##int##BITS##x##SIZE##_impl_data *vec2d = (union v##SIGN##int##BITS##x##SIZE##_impl_data *)&vec2; \
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37 \
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38 vec1d->sse = _mm_##OP##_ep##INTLSIGN##BITS(vec1d->sse, vec2d->sse); \
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39 \
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40 return vec1d->vec; \
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41 }
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42
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43 #define VEC_SSE41_MINMAX_8x16(OP) VEC_SSE41_MINMAX_TEMPLATE( , 8, 16, i, OP)
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44 #define VEC_SSE41_MINMAX_u8x16(OP) VEC_SSE41_MINMAX_TEMPLATE(u, 8, 16, u, OP)
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45 #define VEC_SSE41_MINMAX_16x8(OP) VEC_SSE41_MINMAX_TEMPLATE( , 16, 8, i, OP)
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46 #define VEC_SSE41_MINMAX_u16x8(OP) VEC_SSE41_MINMAX_TEMPLATE(u, 16, 8, u, OP)
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47 #define VEC_SSE41_MINMAX_32x4(OP) VEC_SSE41_MINMAX_TEMPLATE( , 32, 4, i, OP)
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48 #define VEC_SSE41_MINMAX_u32x4(OP) VEC_SSE41_MINMAX_TEMPLATE(u, 32, 4, u, OP)
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49 #define VEC_SSE41_MINMAX_64x2(OP) /* nothing */
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50 #define VEC_SSE41_MINMAX_u64x2(OP) /* nothing */
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51
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52 #define VEC_SSE41_STRUCT_MINMAX_8x16(OP, SIGN) v##SIGN##int8x16_sse41_##OP
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53 #define VEC_SSE41_STRUCT_MINMAX_16x8(OP, SIGN) v##SIGN##int16x8_sse41_##OP
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54 #define VEC_SSE41_STRUCT_MINMAX_32x4(OP, SIGN) v##SIGN##int32x4_sse41_##OP
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55 #define VEC_SSE41_STRUCT_MINMAX_64x2(OP, SIGN) NULL
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56
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57 /* ------------------------------------------------------------------------ */
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58 /* multiplication */
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59
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60 #define VEC_SSE41_MUL_8x16(sign)
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61 #define VEC_SSE41_MUL_16x8(sign)
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62 #define VEC_SSE41_MUL_32x4(sign) \
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63 VEC_FUNC_IMPL v##sign##int32x4 v##sign##int32x4_sse41_mul(v##sign##int32x4 vec1, v##sign##int32x4 vec2) \
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64 { \
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65 union v##sign##int32x4_impl_data *vec1d = (union v##sign##int32x4_impl_data *)&vec1; \
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66 union v##sign##int32x4_impl_data *vec2d = (union v##sign##int32x4_impl_data *)&vec2; \
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67 \
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68 vec1d->sse = _mm_mullo_epi32(vec1d->sse, vec2d->sse); \
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69 return vec1d->vec; \
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70 }
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71 #define VEC_SSE41_MUL_64x2(sign)
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72
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73 #define VEC_SSE41_STRUCT_MUL_8x16(SIGN) NULL
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74 #define VEC_SSE41_STRUCT_MUL_16x8(SIGN) NULL
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75 #define VEC_SSE41_STRUCT_MUL_32x4(SIGN) v##SIGN##int32x4_sse41_mul
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76 #define VEC_SSE41_STRUCT_MUL_64x2(SIGN) NULL
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77
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78 /* ------------------------------------------------------------------------ */
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79 /* comparison */
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80
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81 #define MM_SET1_64(x) _mm_set1_epi64x(x)
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82
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83 /* helper funcs */
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84 #define VEC_xSSE41_CMP(name, op, sign, bits, size, first, second, VARS, TRANS1, TRANS2) \
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85 VEC_FUNC_IMPL v##sign##int##bits##x##size v##sign##int##bits##x##size##_sse41_##name(v##sign##int##bits##x##size vec1, v##sign##int##bits##x##size vec2) \
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86 { \
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87 union v##sign##int##bits##x##size##_impl_data *vec1d = (union v##sign##int##bits##x##size##_impl_data *)&vec1; \
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88 union v##sign##int##bits##x##size##_impl_data *vec2d = (union v##sign##int##bits##x##size##_impl_data *)&vec2; \
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89 VARS \
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90 \
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91 TRANS1 \
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92 \
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93 vec1d->sse = _mm_##op##_epi##bits(vec##first##d->sse, vec##second##d->sse); \
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94 \
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95 TRANS2 \
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96 \
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97 return vec1d->vec; \
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98 }
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99
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100 #define VEC_SSE41_CMP(name, op, bits, size, first, second) \
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101 VEC_xSSE41_CMP(name, op, /* nothing */, bits, size, first, second, /* nothing */, /* nothing */, /* nothing */)
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102
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103 #define VEC_uSSE41_CMP(name, op, bits, size, first, second) \
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104 VEC_xSSE41_CMP(name, op, u, bits, size, first, second, \
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105 __m128i xor_val = MM_SET1_##bits(UINT64_C(1) << (bits - 1)); \
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106 , { \
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107 vec1d->sse = _mm_xor_si128(vec1d->sse, xor_val); \
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108 vec2d->sse = _mm_xor_si128(vec2d->sse, xor_val); \
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109 }, \
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110 { \
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111 /* nothing */ \
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112 })
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113
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114 /* these are the same for unsigned and signed, for obvious reasons. */
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115 #define VEC_SSE41_CMPEQ_8x16(sign) /* nothing */
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116 #define VEC_SSE41_CMPEQ_16x8(sign) /* nothing */
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117 #define VEC_SSE41_CMPEQ_32x4(sign) /* nothing */
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118 #define VEC_SSE41_CMPEQ_64x2(sign) VEC_xSSE41_CMP(cmpeq, cmpeq, sign, 64, 2, 1, 2, , ,)
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119
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120 /* ------------------------------------------------------------------------ */
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121
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122 #define VEC_SSE41_STRUCT_CMP_8x16(name, sign) NULL
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123 #define VEC_SSE41_STRUCT_CMP_16x8(name, sign) NULL
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124 #define VEC_SSE41_STRUCT_CMP_32x4(name, sign) NULL
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125 #define VEC_SSE41_STRUCT_CMP_64x2(name, sign) v##sign##int64x2_sse41_##name
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126
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127 /* ------------------------------------------------------------------------ */
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128
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129 // SSE 4.1 provides a real _mm_mullo_epi32
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130 #define VEC_SSE41_DEFINE_OPERATIONS_SIGN(sign, bits, size) \
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131 union v##sign##int##bits##x##size##_impl_data { \
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132 v##sign##int##bits##x##size vec; \
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133 __m128i sse; \
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134 }; \
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135 \
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136 VEC_STATIC_ASSERT(VEC_ALIGNOF(__m128i) <= VEC_ALIGNOF(v##sign##int##bits##x##size), "vec: v" #sign "int32x4 alignment needs to be expanded to fit intrinsic type size"); \
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137 VEC_STATIC_ASSERT(sizeof(__m128i) <= sizeof(v##sign##int##bits##x##size), "vec: v" #sign "int32x4 needs to be expanded to fit intrinsic type size"); \
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138 \
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139 VEC_SSE41_MUL_##bits##x##size(sign) \
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140 \
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141 VEC_SSE41_MINMAX_##sign##bits##x##size(min) \
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142 VEC_SSE41_MINMAX_##sign##bits##x##size(max) \
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143 \
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144 VEC_SSE41_CMPEQ_##bits##x##size(sign); \
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145 \
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146 const v##sign##int##bits##x##size##_impl v##sign##int##bits##x##size##_impl_sse41 = { \
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147 .mul = VEC_SSE41_STRUCT_MUL_##bits##x##size(sign), \
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148 .min = VEC_SSE41_STRUCT_MINMAX_##bits##x##size(min, sign), \
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149 .max = VEC_SSE41_STRUCT_MINMAX_##bits##x##size(max, sign), \
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150 .cmpeq = VEC_SSE41_STRUCT_CMP_##bits##x##size(cmpeq, sign), \
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151 };
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152
28
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153 #define VEC_SSE41_DEFINE_OPERATIONS(bits, size) \
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154 VEC_SSE41_DEFINE_OPERATIONS_SIGN(u, bits, size) \
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155 VEC_SSE41_DEFINE_OPERATIONS_SIGN( , bits, size)
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156
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157 VEC_SSE41_DEFINE_OPERATIONS(8, 16)
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158 VEC_SSE41_DEFINE_OPERATIONS(16, 8)
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159 VEC_SSE41_DEFINE_OPERATIONS(32, 4)
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160 VEC_SSE41_DEFINE_OPERATIONS(64, 2)