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annotate src/impl/fallback.c @ 28:c6c99ab1088a

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*: add min/max functions and a big big refactor (again) agh, this time I added a few more implementations (and generally made the code just a little faster...)
author Paper <paper@tflc.us>
date Thu, 24 Apr 2025 00:54:02 -0400
parents 92156fe32755
children bf6ad516f1e6
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c6c99ab1088a *: add min/max functions and a big big refactor (again)
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1 /**
c6c99ab1088a *: add min/max functions and a big big refactor (again)
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2 * vec - a tiny SIMD vector library in C99
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3 *
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4 * Copyright (c) 2024 Paper
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5 *
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6 * Permission is hereby granted, free of charge, to any person obtaining a copy
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7 * of this software and associated documentation files (the "Software"), to deal
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8 * in the Software without restriction, including without limitation the rights
c6c99ab1088a *: add min/max functions and a big big refactor (again)
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9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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10 * copies of the Software, and to permit persons to whom the Software is
c6c99ab1088a *: add min/max functions and a big big refactor (again)
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11 * furnished to do so, subject to the following conditions:
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12 *
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13 * The above copyright notice and this permission notice shall be included in all
c6c99ab1088a *: add min/max functions and a big big refactor (again)
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14 * copies or substantial portions of the Software.
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15 *
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16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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19 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
c6c99ab1088a *: add min/max functions and a big big refactor (again)
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22 * SOFTWARE.
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23 **/
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24
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25 #include "vec/impl/fallback.h"
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26
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27 #include <string.h>
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28
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29 // Fallback implementations - this is what an implementation should use if it
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30 // doesn't support a specific function *and* the actual representation in
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31 // memory is unknown or yields incorrect results from the generic functions.
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32 // This is *extremely* unlikely; for x86 the layout is exactly the same in
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33 // memory as the generic functions (i.e. it is literally stored as an array of
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34 // integers). This is also true for AltiVec. This is likely true for NEON as well,
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35 // but that isn't tested for now.
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36
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37 #define VEC_FALLBACK_OPERATION(op, sign, csign, bits, size) \
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38 do { \
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39 V##csign##INT##bits##x##size##_ALIGNED_ARRAY(varr1); \
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40 V##csign##INT##bits##x##size##_ALIGNED_ARRAY(varr2); \
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41 \
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42 v##sign##int##bits##x##size##_store_aligned(vec1, varr1); \
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43 v##sign##int##bits##x##size##_store_aligned(vec2, varr2); \
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44 \
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45 for (int i = 0; i < size; i++) varr1[i] = (op); \
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46 \
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47 return v##sign##int##bits##x##size##_load_aligned(varr1); \
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48 } while (0)
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49
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50 #define VEC_FALLBACK_CMP(op, sign, csign, bits, size) \
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51 VEC_FALLBACK_OPERATION((varr1[i] op varr2[i]) ? VEC_UINT##bits##_MAX : 0, sign, csign, bits, size)
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52
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53 #define VEC_FALLBACK_SHIFT(op, sign, csign, bits, size) \
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54 do { \
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55 V##csign##INT##bits##x##size##_ALIGNED_ARRAY(varr1); \
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56 VUINT##bits##x##size##_ALIGNED_ARRAY(varr2); \
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57 \
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58 v##sign##int##bits##x##size##_store_aligned(vec1, varr1); \
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59 vuint##bits##x##size##_store_aligned(vec2, varr2); \
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60 \
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61 for (int i = 0; i < size; i++) varr1[i] = (op); \
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62 \
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63 return v##sign##int##bits##x##size##_load_aligned(varr1); \
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64 } while (0)
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65
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66 #define VEC_DEFINE_FALLBACK_OPERATIONS_SIGN(sign, csign, bits, size) \
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67 v##sign##int##bits##x##size v##sign##int##bits##x##size##_fallback_splat(vec_##sign##int##bits x) \
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68 { \
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69 V##csign##INT##bits##x##size##_ALIGNED_ARRAY(arr); \
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70 for (int i = 0; i < size; i++) arr[i] = x; \
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71 return v##sign##int##bits##x##size##_load_aligned(arr); \
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72 } \
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73 \
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74 v##sign##int##bits##x##size v##sign##int##bits##x##size##_fallback_load(const vec_##sign##int##bits in[size]) \
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75 { \
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76 V##csign##INT##bits##x##size##_ALIGNED_ARRAY(arr); \
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77 memcpy(arr, in, sizeof(vec_##sign##int##bits) * size); \
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78 return v##sign##int##bits##x##size##_load_aligned(arr); \
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79 } \
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80 \
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81 void v##sign##int##bits##x##size##_fallback_store(v##sign##int##bits##x##size vec, vec_##sign##int##bits out[size]) \
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82 { \
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83 V##csign##INT##bits##x##size##_ALIGNED_ARRAY(arr); \
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84 v##sign##int##bits##x##size##_store_aligned(vec, arr); \
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85 memcpy(out, arr, sizeof(vec_##sign##int##bits) * size); \
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86 } \
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87 \
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88 v##sign##int##bits##x##size v##sign##int##bits##x##size##_fallback_add(v##sign##int##bits##x##size vec1, v##sign##int##bits##x##size vec2) \
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89 { \
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90 VEC_FALLBACK_OPERATION(varr1[i] + varr2[i], sign, csign, bits, size); \
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91 } \
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92 \
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93 v##sign##int##bits##x##size v##sign##int##bits##x##size##_fallback_sub(v##sign##int##bits##x##size vec1, v##sign##int##bits##x##size vec2) \
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94 { \
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95 VEC_FALLBACK_OPERATION(varr1[i] - varr2[i], sign, csign, bits, size); \
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96 } \
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97 \
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98 v##sign##int##bits##x##size v##sign##int##bits##x##size##_fallback_mul(v##sign##int##bits##x##size vec1, v##sign##int##bits##x##size vec2) \
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99 { \
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100 VEC_FALLBACK_OPERATION(varr1[i] * varr2[i], sign, csign, bits, size); \
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101 } \
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102 \
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103 v##sign##int##bits##x##size v##sign##int##bits##x##size##_fallback_div(v##sign##int##bits##x##size vec1, v##sign##int##bits##x##size vec2) \
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104 { \
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105 VEC_FALLBACK_OPERATION(varr2[i] ? (varr1[i] / varr2[i]) : 0, sign, csign, bits, size); \
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106 } \
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107 \
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108 v##sign##int##bits##x##size v##sign##int##bits##x##size##_fallback_avg(v##sign##int##bits##x##size vec1, v##sign##int##bits##x##size vec2) \
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109 { \
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110 VEC_FALLBACK_OPERATION(vec_##sign##avg(varr1[i], varr2[i]), sign, csign, bits, size); \
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111 } \
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112 \
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113 v##sign##int##bits##x##size v##sign##int##bits##x##size##_fallback_and(v##sign##int##bits##x##size vec1, v##sign##int##bits##x##size vec2) \
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114 { \
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115 VEC_FALLBACK_OPERATION(varr1[i] & varr2[i], sign, csign, bits, size); \
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116 } \
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117 \
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118 v##sign##int##bits##x##size v##sign##int##bits##x##size##_fallback_or(v##sign##int##bits##x##size vec1, v##sign##int##bits##x##size vec2) \
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119 { \
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120 VEC_FALLBACK_OPERATION(varr1[i] | varr2[i], sign, csign, bits, size); \
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121 } \
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122 \
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123 v##sign##int##bits##x##size v##sign##int##bits##x##size##_fallback_xor(v##sign##int##bits##x##size vec1, v##sign##int##bits##x##size vec2) \
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124 { \
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125 VEC_FALLBACK_OPERATION(varr1[i] ^ varr2[i], sign, csign, bits, size); \
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126 } \
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127 \
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128 v##sign##int##bits##x##size v##sign##int##bits##x##size##_fallback_not(v##sign##int##bits##x##size vec) \
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129 { \
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130 return v##sign##int##bits##x##size##_xor(vec, v##sign##int##bits##x##size##_splat((vec_##sign##int##bits)VEC_UINT##bits##_MAX)); \
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131 } \
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132 \
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133 v##sign##int##bits##x##size v##sign##int##bits##x##size##_fallback_cmplt(v##sign##int##bits##x##size vec1, v##sign##int##bits##x##size vec2) \
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134 { \
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135 VEC_FALLBACK_CMP(<, sign, csign, bits, size); \
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136 } \
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137 \
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138 v##sign##int##bits##x##size v##sign##int##bits##x##size##_fallback_cmple(v##sign##int##bits##x##size vec1, v##sign##int##bits##x##size vec2) \
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139 { \
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140 VEC_FALLBACK_CMP(<=, sign, csign, bits, size); \
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141 } \
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142 \
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143 v##sign##int##bits##x##size v##sign##int##bits##x##size##_fallback_cmpeq(v##sign##int##bits##x##size vec1, v##sign##int##bits##x##size vec2) \
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144 { \
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145 VEC_FALLBACK_CMP(==, sign, csign, bits, size); \
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146 } \
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147 \
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148 v##sign##int##bits##x##size v##sign##int##bits##x##size##_fallback_cmpge(v##sign##int##bits##x##size vec1, v##sign##int##bits##x##size vec2) \
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149 { \
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150 VEC_FALLBACK_CMP(>=, sign, csign, bits, size); \
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151 } \
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152 \
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153 v##sign##int##bits##x##size v##sign##int##bits##x##size##_fallback_cmpgt(v##sign##int##bits##x##size vec1, v##sign##int##bits##x##size vec2) \
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154 { \
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155 VEC_FALLBACK_CMP(>, sign, csign, bits, size); \
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156 } \
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157 \
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158 v##sign##int##bits##x##size v##sign##int##bits##x##size##_fallback_lshift(v##sign##int##bits##x##size vec1, vuint##bits##x##size vec2) \
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159 { \
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160 VEC_FALLBACK_SHIFT(vec_##sign##lshift(varr1[i], varr2[i]), sign, csign, bits, size); \
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161 } \
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162 \
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163 v##sign##int##bits##x##size v##sign##int##bits##x##size##_fallback_rshift(v##sign##int##bits##x##size vec1, vuint##bits##x##size vec2) \
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164 { \
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165 VEC_FALLBACK_SHIFT(vec_##sign##rshift(varr1[i], varr2[i]), sign, csign, bits, size); \
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166 } \
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167 \
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168 v##sign##int##bits##x##size v##sign##int##bits##x##size##_fallback_lrshift(v##sign##int##bits##x##size vec1, vuint##bits##x##size vec2) \
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169 { \
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170 VEC_FALLBACK_SHIFT(vec_lrshift((vec_uint##bits)varr1[i], varr2[i]), sign, csign, bits, size); \
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171 }
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172
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173 #define VEC_DEFINE_FALLBACK_OPERATIONS(bits, size) \
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174 VEC_DEFINE_FALLBACK_OPERATIONS_SIGN( , , bits, size) \
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175 VEC_DEFINE_FALLBACK_OPERATIONS_SIGN(u, U, bits, size)
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176
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177 // 16-bit
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178 VEC_DEFINE_FALLBACK_OPERATIONS(8, 2)
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179
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180 // 32-bit
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Paper <paper@tflc.us>
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181 VEC_DEFINE_FALLBACK_OPERATIONS(8, 4)
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Paper <paper@tflc.us>
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182 VEC_DEFINE_FALLBACK_OPERATIONS(16, 2)
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183
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184 // 64-bit
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185 VEC_DEFINE_FALLBACK_OPERATIONS(8, 8)
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186 VEC_DEFINE_FALLBACK_OPERATIONS(16, 4)
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Paper <paper@tflc.us>
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187 VEC_DEFINE_FALLBACK_OPERATIONS(32, 2)
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188
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189 // 128-bit
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Paper <paper@tflc.us>
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190 VEC_DEFINE_FALLBACK_OPERATIONS(8, 16)
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Paper <paper@tflc.us>
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191 VEC_DEFINE_FALLBACK_OPERATIONS(16, 8)
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Paper <paper@tflc.us>
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192 VEC_DEFINE_FALLBACK_OPERATIONS(32, 4)
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Paper <paper@tflc.us>
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193 VEC_DEFINE_FALLBACK_OPERATIONS(64, 2)
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Paper <paper@tflc.us>
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194
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Paper <paper@tflc.us>
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195 // 256-bit
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Paper <paper@tflc.us>
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196 VEC_DEFINE_FALLBACK_OPERATIONS(8, 32)
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Paper <paper@tflc.us>
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197 VEC_DEFINE_FALLBACK_OPERATIONS(16, 16)
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Paper <paper@tflc.us>
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198 VEC_DEFINE_FALLBACK_OPERATIONS(32, 8)
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199 VEC_DEFINE_FALLBACK_OPERATIONS(64, 4)
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200
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201 // 512-bit
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Paper <paper@tflc.us>
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202 VEC_DEFINE_FALLBACK_OPERATIONS(8, 64)
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Paper <paper@tflc.us>
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203 VEC_DEFINE_FALLBACK_OPERATIONS(16, 32)
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Paper <paper@tflc.us>
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204 VEC_DEFINE_FALLBACK_OPERATIONS(32, 16)
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Paper <paper@tflc.us>
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205 VEC_DEFINE_FALLBACK_OPERATIONS(64, 8)
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206
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207 #undef VEC_FALLBACK_OPERATION
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208 #undef VEC_FALLBACK_CMP
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209 #undef VEC_FALLBACK_SHIFT
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210 #undef VEC_DEFINE_FALLBACK_OPERATIONS
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211 #undef VEC_DEFINE_FALLBACK_OPERATIONS_SIGN