Mercurial > vec
comparison src/impl/x86/avx512bw.c @ 28:c6c99ab1088a
*: add min/max functions and a big big refactor (again)
agh, this time I added a few more implementations (and generally
made the code just a little faster...)
author | Paper <paper@tflc.us> |
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date | Thu, 24 Apr 2025 00:54:02 -0400 |
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27:d00b95f95dd1 | 28:c6c99ab1088a |
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1 /** | |
2 * vec - a tiny SIMD vector library in C99 | |
3 * | |
4 * Copyright (c) 2024 Paper | |
5 * | |
6 * Permission is hereby granted, free of charge, to any person obtaining a copy | |
7 * of this software and associated documentation files (the "Software"), to deal | |
8 * in the Software without restriction, including without limitation the rights | |
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell | |
10 * copies of the Software, and to permit persons to whom the Software is | |
11 * furnished to do so, subject to the following conditions: | |
12 * | |
13 * The above copyright notice and this permission notice shall be included in all | |
14 * copies or substantial portions of the Software. | |
15 * | |
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE | |
19 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | |
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, | |
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE | |
22 * SOFTWARE. | |
23 **/ | |
24 | |
25 #include "vec/impl/x86/avx512bw.h" | |
26 | |
27 #include <immintrin.h> | |
28 | |
29 /* ------------------------------------------------------------------------ */ | |
30 | |
31 #define VEC_AVX512BW_MINMAX_TEMPLATE(SIGN, BITS, SIZE, INTLSIGN, OP) \ | |
32 VEC_FUNC_IMPL v##SIGN##int##BITS##x##SIZE v##SIGN##int##BITS##x##SIZE##_avx512bw_##OP(v##SIGN##int##BITS##x##SIZE vec1, v##SIGN##int##BITS##x##SIZE vec2) \ | |
33 { \ | |
34 union v##SIGN##int##BITS##x##SIZE##_impl_data *vec1d = (union v##SIGN##int##BITS##x##SIZE##_impl_data *)&vec1; \ | |
35 union v##SIGN##int##BITS##x##SIZE##_impl_data *vec2d = (union v##SIGN##int##BITS##x##SIZE##_impl_data *)&vec2; \ | |
36 \ | |
37 vec1d->avx512bw = _mm512_##OP##_ep##INTLSIGN##BITS(vec1d->avx512bw, vec2d->avx512bw); \ | |
38 \ | |
39 return vec1d->vec; \ | |
40 } | |
41 | |
42 #define VEC_AVX512BW_MINMAX_8x64(OP) VEC_AVX512BW_MINMAX_TEMPLATE( , 8, 64, i, OP) | |
43 #define VEC_AVX512BW_MINMAX_u8x64(OP) VEC_AVX512BW_MINMAX_TEMPLATE(u, 8, 64, u, OP) | |
44 #define VEC_AVX512BW_MINMAX_16x32(OP) VEC_AVX512BW_MINMAX_TEMPLATE( , 16, 32, i, OP) | |
45 #define VEC_AVX512BW_MINMAX_u16x32(OP) VEC_AVX512BW_MINMAX_TEMPLATE(u, 16, 32, u, OP) | |
46 | |
47 #define VEC_AVX512BW_STRUCT_MINMAX_8x64(OP, SIGN) v##SIGN##int8x64_avx512bw_##OP | |
48 #define VEC_AVX512BW_STRUCT_MINMAX_16x32(OP, SIGN) v##SIGN##int16x32_avx512bw_##OP | |
49 | |
50 /* ------------------------------------------------------------------------ */ | |
51 | |
52 #define VEC_AVX512BW_OPERATION_EX(name, op, sign, bits, size, secondsign) \ | |
53 VEC_FUNC_IMPL v##sign##int##bits##x##size v##sign##int##bits##x##size##_avx512bw_##name(v##sign##int##bits##x##size vec1, v##secondsign##int##bits##x##size vec2) \ | |
54 { \ | |
55 union v##sign##int##bits##x##size##_impl_data *vec1d = (union v##sign##int##bits##x##size##_impl_data *)&vec1; \ | |
56 union v##secondsign##int##bits##x##size##_impl_data *vec2d = (union v##secondsign##int##bits##x##size##_impl_data *)&vec2; \ | |
57 \ | |
58 vec1d->avx512bw = _mm512_##op##_epi##bits(vec1d->avx512bw, vec2d->avx512bw); \ | |
59 \ | |
60 return vec1d->vec; \ | |
61 } | |
62 | |
63 #define VEC_AVX512BW_OPERATION(name, op, sign, bits, size) \ | |
64 VEC_AVX512BW_OPERATION_EX(name, op, sign, bits, size, sign) | |
65 | |
66 #define VEC_AVX512BW_OPERATION_SHIFT(name, op, sign, bits, size) \ | |
67 VEC_AVX512BW_OPERATION_EX(name, op, sign, bits, size, u) | |
68 | |
69 #define VEC_AVX512BW_ADD_8x64(sign) VEC_AVX512BW_OPERATION(add, add, sign, 8, 64) | |
70 #define VEC_AVX512BW_ADD_16x32(sign) VEC_AVX512BW_OPERATION(add, add, sign, 16, 32) | |
71 | |
72 #define VEC_AVX512BW_SUB_8x64(sign) VEC_AVX512BW_OPERATION(sub, sub, sign, 8, 64) | |
73 #define VEC_AVX512BW_SUB_16x32(sign) VEC_AVX512BW_OPERATION(sub, sub, sign, 16, 32) | |
74 | |
75 #define VEC_AVX512BW_MUL_8x64(sign) /* nothing */ | |
76 #define VEC_AVX512BW_MUL_16x32(sign) VEC_AVX512BW_OPERATION(mul, mullo, sign, 16, 32) | |
77 | |
78 #define VEC_AVX512BW_LSHIFT_8x64(sign) /* nothing */ | |
79 #define VEC_AVX512BW_LSHIFT_16x32(sign) VEC_AVX512BW_OPERATION_SHIFT(lshift, sllv, sign, 16, 32) | |
80 | |
81 #define VEC_AVX512BW_XRSHIFT(name, bits, size, sign, aORl) \ | |
82 VEC_AVX512BW_OPERATION_SHIFT(name, sr##aORl##v, sign, bits, size) | |
83 | |
84 /* always the same, regardless of signedness */ | |
85 #define VEC_AVX512BW_LRSHIFT_8x64(sign) /* nothing */ | |
86 #define VEC_AVX512BW_LRSHIFT_16x32(sign) VEC_AVX512BW_XRSHIFT(lrshift, 16, 32, sign, l) | |
87 | |
88 #define VEC_AVX512BW_RSHIFT_8x64(sign) /* nothing */ | |
89 #define VEC_AVX512BW_RSHIFT_16x32(sign) VEC_AVX512BW_XRSHIFT(rshift, 16, 32, sign, a) | |
90 | |
91 #define VEC_AVX512BW_uRSHIFT_8x64(sign) /* nothing */ | |
92 #define VEC_AVX512BW_uRSHIFT_16x32(sign) VEC_AVX512BW_XRSHIFT(rshift, 16, 32, sign, l) | |
93 | |
94 /* ok */ | |
95 #define VEC_AVX512BW_STRUCT_ADDSUB_8x64(OP, SIGN) v##SIGN##int8x64_avx512bw_##OP | |
96 #define VEC_AVX512BW_STRUCT_ADDSUB_16x32(OP, SIGN) v##SIGN##int16x32_avx512bw_##OP | |
97 | |
98 #define VEC_AVX512BW_STRUCT_OPERATION_8x64(OP, SIGN) NULL | |
99 #define VEC_AVX512BW_STRUCT_OPERATION_16x32(OP, SIGN) v##SIGN##int16x32_avx512bw_##OP | |
100 | |
101 /* ------------------------------------------------------------------------ */ | |
102 | |
103 #define VEC_AVX512BW_DEFINE_OPERATIONS_SIGN(sign, bits, size) \ | |
104 union v##sign##int##bits##x##size##_impl_data { \ | |
105 v##sign##int##bits##x##size vec; \ | |
106 __m512i avx512bw; \ | |
107 }; \ | |
108 \ | |
109 VEC_STATIC_ASSERT(VEC_ALIGNOF(__m512i) <= VEC_ALIGNOF(v##sign##int##bits##x##size), "vec: v" #sign "int" #bits "x" #size " alignment needs to be expanded to fit intrinsic type size"); \ | |
110 VEC_STATIC_ASSERT(sizeof(__m512i) <= sizeof(v##sign##int##bits##x##size), "vec: v" #sign "int" #bits "x" #size " needs to be expanded to fit intrinsic type size"); \ | |
111 \ | |
112 VEC_AVX512BW_ADD_##bits##x##size(sign) \ | |
113 VEC_AVX512BW_SUB_##bits##x##size(sign) \ | |
114 VEC_AVX512BW_MUL_##bits##x##size(sign) \ | |
115 \ | |
116 VEC_AVX512BW_LSHIFT_##bits##x##size(sign); \ | |
117 VEC_AVX512BW_##sign##RSHIFT_##bits##x##size(sign); \ | |
118 VEC_AVX512BW_LRSHIFT_##bits##x##size(sign); \ | |
119 \ | |
120 VEC_AVX512BW_MINMAX_##sign##bits##x##size(min) \ | |
121 VEC_AVX512BW_MINMAX_##sign##bits##x##size(max) \ | |
122 \ | |
123 const v##sign##int##bits##x##size##_impl v##sign##int##bits##x##size##_impl_avx512bw = { \ | |
124 .add = VEC_AVX512BW_STRUCT_ADDSUB_##bits##x##size(add, sign), \ | |
125 .sub = VEC_AVX512BW_STRUCT_ADDSUB_##bits##x##size(sub, sign), \ | |
126 .mul = VEC_AVX512BW_STRUCT_OPERATION_##bits##x##size(mul, sign), \ | |
127 .lshift = VEC_AVX512BW_STRUCT_OPERATION_##bits##x##size(lshift, sign), \ | |
128 .rshift = VEC_AVX512BW_STRUCT_OPERATION_##bits##x##size(rshift, sign), \ | |
129 .lrshift = VEC_AVX512BW_STRUCT_OPERATION_##bits##x##size(lrshift, sign), \ | |
130 .min = VEC_AVX512BW_STRUCT_MINMAX_##bits##x##size(min, sign), \ | |
131 .max = VEC_AVX512BW_STRUCT_MINMAX_##bits##x##size(max, sign), \ | |
132 }; | |
133 | |
134 #define VEC_AVX512BW_DEFINE_OPERATIONS(bits, size) \ | |
135 VEC_AVX512BW_DEFINE_OPERATIONS_SIGN(u, bits, size) \ | |
136 VEC_AVX512BW_DEFINE_OPERATIONS_SIGN( , bits, size) | |
137 | |
138 VEC_AVX512BW_DEFINE_OPERATIONS(8, 64) | |
139 VEC_AVX512BW_DEFINE_OPERATIONS(16, 32) |