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annotate src/impl/x86/avx512bw.c @ 28:c6c99ab1088a

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*: add min/max functions and a big big refactor (again) agh, this time I added a few more implementations (and generally made the code just a little faster...)
author Paper <paper@tflc.us>
date Thu, 24 Apr 2025 00:54:02 -0400
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1 /**
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2 * vec - a tiny SIMD vector library in C99
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3 *
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4 * Copyright (c) 2024 Paper
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5 *
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6 * Permission is hereby granted, free of charge, to any person obtaining a copy
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7 * of this software and associated documentation files (the "Software"), to deal
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8 * in the Software without restriction, including without limitation the rights
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9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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10 * copies of the Software, and to permit persons to whom the Software is
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11 * furnished to do so, subject to the following conditions:
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12 *
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13 * The above copyright notice and this permission notice shall be included in all
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14 * copies or substantial portions of the Software.
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15 *
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16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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19 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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22 * SOFTWARE.
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23 **/
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24
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25 #include "vec/impl/x86/avx512bw.h"
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27 #include <immintrin.h>
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28
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29 /* ------------------------------------------------------------------------ */
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30
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31 #define VEC_AVX512BW_MINMAX_TEMPLATE(SIGN, BITS, SIZE, INTLSIGN, OP) \
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32 VEC_FUNC_IMPL v##SIGN##int##BITS##x##SIZE v##SIGN##int##BITS##x##SIZE##_avx512bw_##OP(v##SIGN##int##BITS##x##SIZE vec1, v##SIGN##int##BITS##x##SIZE vec2) \
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33 { \
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34 union v##SIGN##int##BITS##x##SIZE##_impl_data *vec1d = (union v##SIGN##int##BITS##x##SIZE##_impl_data *)&vec1; \
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35 union v##SIGN##int##BITS##x##SIZE##_impl_data *vec2d = (union v##SIGN##int##BITS##x##SIZE##_impl_data *)&vec2; \
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36 \
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37 vec1d->avx512bw = _mm512_##OP##_ep##INTLSIGN##BITS(vec1d->avx512bw, vec2d->avx512bw); \
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38 \
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39 return vec1d->vec; \
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40 }
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41
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42 #define VEC_AVX512BW_MINMAX_8x64(OP) VEC_AVX512BW_MINMAX_TEMPLATE( , 8, 64, i, OP)
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43 #define VEC_AVX512BW_MINMAX_u8x64(OP) VEC_AVX512BW_MINMAX_TEMPLATE(u, 8, 64, u, OP)
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44 #define VEC_AVX512BW_MINMAX_16x32(OP) VEC_AVX512BW_MINMAX_TEMPLATE( , 16, 32, i, OP)
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45 #define VEC_AVX512BW_MINMAX_u16x32(OP) VEC_AVX512BW_MINMAX_TEMPLATE(u, 16, 32, u, OP)
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46
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47 #define VEC_AVX512BW_STRUCT_MINMAX_8x64(OP, SIGN) v##SIGN##int8x64_avx512bw_##OP
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48 #define VEC_AVX512BW_STRUCT_MINMAX_16x32(OP, SIGN) v##SIGN##int16x32_avx512bw_##OP
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49
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50 /* ------------------------------------------------------------------------ */
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51
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52 #define VEC_AVX512BW_OPERATION_EX(name, op, sign, bits, size, secondsign) \
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53 VEC_FUNC_IMPL v##sign##int##bits##x##size v##sign##int##bits##x##size##_avx512bw_##name(v##sign##int##bits##x##size vec1, v##secondsign##int##bits##x##size vec2) \
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54 { \
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55 union v##sign##int##bits##x##size##_impl_data *vec1d = (union v##sign##int##bits##x##size##_impl_data *)&vec1; \
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56 union v##secondsign##int##bits##x##size##_impl_data *vec2d = (union v##secondsign##int##bits##x##size##_impl_data *)&vec2; \
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57 \
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58 vec1d->avx512bw = _mm512_##op##_epi##bits(vec1d->avx512bw, vec2d->avx512bw); \
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59 \
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60 return vec1d->vec; \
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61 }
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62
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63 #define VEC_AVX512BW_OPERATION(name, op, sign, bits, size) \
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64 VEC_AVX512BW_OPERATION_EX(name, op, sign, bits, size, sign)
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65
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66 #define VEC_AVX512BW_OPERATION_SHIFT(name, op, sign, bits, size) \
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67 VEC_AVX512BW_OPERATION_EX(name, op, sign, bits, size, u)
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68
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69 #define VEC_AVX512BW_ADD_8x64(sign) VEC_AVX512BW_OPERATION(add, add, sign, 8, 64)
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70 #define VEC_AVX512BW_ADD_16x32(sign) VEC_AVX512BW_OPERATION(add, add, sign, 16, 32)
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71
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72 #define VEC_AVX512BW_SUB_8x64(sign) VEC_AVX512BW_OPERATION(sub, sub, sign, 8, 64)
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73 #define VEC_AVX512BW_SUB_16x32(sign) VEC_AVX512BW_OPERATION(sub, sub, sign, 16, 32)
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74
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75 #define VEC_AVX512BW_MUL_8x64(sign) /* nothing */
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76 #define VEC_AVX512BW_MUL_16x32(sign) VEC_AVX512BW_OPERATION(mul, mullo, sign, 16, 32)
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77
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78 #define VEC_AVX512BW_LSHIFT_8x64(sign) /* nothing */
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79 #define VEC_AVX512BW_LSHIFT_16x32(sign) VEC_AVX512BW_OPERATION_SHIFT(lshift, sllv, sign, 16, 32)
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80
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81 #define VEC_AVX512BW_XRSHIFT(name, bits, size, sign, aORl) \
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82 VEC_AVX512BW_OPERATION_SHIFT(name, sr##aORl##v, sign, bits, size)
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83
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84 /* always the same, regardless of signedness */
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85 #define VEC_AVX512BW_LRSHIFT_8x64(sign) /* nothing */
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86 #define VEC_AVX512BW_LRSHIFT_16x32(sign) VEC_AVX512BW_XRSHIFT(lrshift, 16, 32, sign, l)
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87
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88 #define VEC_AVX512BW_RSHIFT_8x64(sign) /* nothing */
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89 #define VEC_AVX512BW_RSHIFT_16x32(sign) VEC_AVX512BW_XRSHIFT(rshift, 16, 32, sign, a)
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90
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91 #define VEC_AVX512BW_uRSHIFT_8x64(sign) /* nothing */
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92 #define VEC_AVX512BW_uRSHIFT_16x32(sign) VEC_AVX512BW_XRSHIFT(rshift, 16, 32, sign, l)
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93
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94 /* ok */
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95 #define VEC_AVX512BW_STRUCT_ADDSUB_8x64(OP, SIGN) v##SIGN##int8x64_avx512bw_##OP
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96 #define VEC_AVX512BW_STRUCT_ADDSUB_16x32(OP, SIGN) v##SIGN##int16x32_avx512bw_##OP
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97
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98 #define VEC_AVX512BW_STRUCT_OPERATION_8x64(OP, SIGN) NULL
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99 #define VEC_AVX512BW_STRUCT_OPERATION_16x32(OP, SIGN) v##SIGN##int16x32_avx512bw_##OP
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100
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101 /* ------------------------------------------------------------------------ */
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102
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103 #define VEC_AVX512BW_DEFINE_OPERATIONS_SIGN(sign, bits, size) \
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104 union v##sign##int##bits##x##size##_impl_data { \
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105 v##sign##int##bits##x##size vec; \
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106 __m512i avx512bw; \
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107 }; \
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108 \
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109 VEC_STATIC_ASSERT(VEC_ALIGNOF(__m512i) <= VEC_ALIGNOF(v##sign##int##bits##x##size), "vec: v" #sign "int" #bits "x" #size " alignment needs to be expanded to fit intrinsic type size"); \
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110 VEC_STATIC_ASSERT(sizeof(__m512i) <= sizeof(v##sign##int##bits##x##size), "vec: v" #sign "int" #bits "x" #size " needs to be expanded to fit intrinsic type size"); \
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111 \
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112 VEC_AVX512BW_ADD_##bits##x##size(sign) \
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113 VEC_AVX512BW_SUB_##bits##x##size(sign) \
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114 VEC_AVX512BW_MUL_##bits##x##size(sign) \
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115 \
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116 VEC_AVX512BW_LSHIFT_##bits##x##size(sign); \
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117 VEC_AVX512BW_##sign##RSHIFT_##bits##x##size(sign); \
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118 VEC_AVX512BW_LRSHIFT_##bits##x##size(sign); \
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119 \
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120 VEC_AVX512BW_MINMAX_##sign##bits##x##size(min) \
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121 VEC_AVX512BW_MINMAX_##sign##bits##x##size(max) \
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122 \
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123 const v##sign##int##bits##x##size##_impl v##sign##int##bits##x##size##_impl_avx512bw = { \
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124 .add = VEC_AVX512BW_STRUCT_ADDSUB_##bits##x##size(add, sign), \
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125 .sub = VEC_AVX512BW_STRUCT_ADDSUB_##bits##x##size(sub, sign), \
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126 .mul = VEC_AVX512BW_STRUCT_OPERATION_##bits##x##size(mul, sign), \
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127 .lshift = VEC_AVX512BW_STRUCT_OPERATION_##bits##x##size(lshift, sign), \
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128 .rshift = VEC_AVX512BW_STRUCT_OPERATION_##bits##x##size(rshift, sign), \
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129 .lrshift = VEC_AVX512BW_STRUCT_OPERATION_##bits##x##size(lrshift, sign), \
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130 .min = VEC_AVX512BW_STRUCT_MINMAX_##bits##x##size(min, sign), \
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131 .max = VEC_AVX512BW_STRUCT_MINMAX_##bits##x##size(max, sign), \
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132 };
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133
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134 #define VEC_AVX512BW_DEFINE_OPERATIONS(bits, size) \
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135 VEC_AVX512BW_DEFINE_OPERATIONS_SIGN(u, bits, size) \
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136 VEC_AVX512BW_DEFINE_OPERATIONS_SIGN( , bits, size)
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137
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138 VEC_AVX512BW_DEFINE_OPERATIONS(8, 64)
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139 VEC_AVX512BW_DEFINE_OPERATIONS(16, 32)