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comparison src/impl/x86/avx512dq.c @ 28:c6c99ab1088a

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*: add min/max functions and a big big refactor (again) agh, this time I added a few more implementations (and generally made the code just a little faster...)
author Paper <paper@tflc.us>
date Thu, 24 Apr 2025 00:54:02 -0400
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27:d00b95f95dd1 28:c6c99ab1088a
1 /**
2 * vec - a tiny SIMD vector library in C99
3 *
4 * Copyright (c) 2024 Paper
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in all
14 * copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
19 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
22 * SOFTWARE.
23 **/
24
25 #include "vec/impl/x86/avx512dq.h"
26
27 #include <immintrin.h>
28
29 /* ------------------------------------------------------------------------ */
30
31 #define VEC_AVX512DQ_DEFINE_OPERATIONS_SIGN(sign, bits, size) \
32 union v##sign##int##bits##x##size##_impl_data { \
33 v##sign##int##bits##x##size vec; \
34 __m512i avx512dq; \
35 }; \
36 \
37 VEC_STATIC_ASSERT(VEC_ALIGNOF(__m512i) <= VEC_ALIGNOF(v##sign##int##bits##x##size), "vec: v" #sign "int" #bits "x" #size " alignment needs to be expanded to fit intrinsic type size"); \
38 VEC_STATIC_ASSERT(sizeof(__m512i) <= sizeof(v##sign##int##bits##x##size), "vec: v" #sign "int" #bits "x" #size " needs to be expanded to fit intrinsic type size"); \
39 \
40 VEC_FUNC_IMPL v##sign##int##bits##x##size v##sign##int##bits##x##size##_avx512dq_mul(v##sign##int##bits##x##size vec1, v##sign##int##bits##x##size vec2) \
41 { \
42 union v##sign##int##bits##x##size##_impl_data *vec1d = (union v##sign##int##bits##x##size##_impl_data *)&vec1; \
43 union v##sign##int##bits##x##size##_impl_data *vec2d = (union v##sign##int##bits##x##size##_impl_data *)&vec2; \
44 \
45 vec1d->avx512dq = _mm512_mullo_epi64(vec1d->avx512dq, vec2d->avx512dq); \
46 return vec1d->vec; \
47 } \
48 \
49 const v##sign##int##bits##x##size##_impl v##sign##int##bits##x##size##_impl_avx512dq = { \
50 .mul = v##sign##int##bits##x##size##_avx512dq_mul, \
51 };
52
53 #define VEC_AVX512DQ_DEFINE_OPERATIONS(bits, size) \
54 VEC_AVX512DQ_DEFINE_OPERATIONS_SIGN(u, bits, size) \
55 VEC_AVX512DQ_DEFINE_OPERATIONS_SIGN( , bits, size)
56
57 VEC_AVX512DQ_DEFINE_OPERATIONS(64, 8)