Mercurial > vec
diff src/impl/x86/avx512dq.c @ 28:c6c99ab1088a
*: add min/max functions and a big big refactor (again)
agh, this time I added a few more implementations (and generally
made the code just a little faster...)
author | Paper <paper@tflc.us> |
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date | Thu, 24 Apr 2025 00:54:02 -0400 |
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--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/src/impl/x86/avx512dq.c Thu Apr 24 00:54:02 2025 -0400 @@ -0,0 +1,57 @@ +/** + * vec - a tiny SIMD vector library in C99 + * + * Copyright (c) 2024 Paper + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. +**/ + +#include "vec/impl/x86/avx512dq.h" + +#include <immintrin.h> + +/* ------------------------------------------------------------------------ */ + +#define VEC_AVX512DQ_DEFINE_OPERATIONS_SIGN(sign, bits, size) \ + union v##sign##int##bits##x##size##_impl_data { \ + v##sign##int##bits##x##size vec; \ + __m512i avx512dq; \ + }; \ + \ + VEC_STATIC_ASSERT(VEC_ALIGNOF(__m512i) <= VEC_ALIGNOF(v##sign##int##bits##x##size), "vec: v" #sign "int" #bits "x" #size " alignment needs to be expanded to fit intrinsic type size"); \ + VEC_STATIC_ASSERT(sizeof(__m512i) <= sizeof(v##sign##int##bits##x##size), "vec: v" #sign "int" #bits "x" #size " needs to be expanded to fit intrinsic type size"); \ + \ + VEC_FUNC_IMPL v##sign##int##bits##x##size v##sign##int##bits##x##size##_avx512dq_mul(v##sign##int##bits##x##size vec1, v##sign##int##bits##x##size vec2) \ + { \ + union v##sign##int##bits##x##size##_impl_data *vec1d = (union v##sign##int##bits##x##size##_impl_data *)&vec1; \ + union v##sign##int##bits##x##size##_impl_data *vec2d = (union v##sign##int##bits##x##size##_impl_data *)&vec2; \ + \ + vec1d->avx512dq = _mm512_mullo_epi64(vec1d->avx512dq, vec2d->avx512dq); \ + return vec1d->vec; \ + } \ + \ + const v##sign##int##bits##x##size##_impl v##sign##int##bits##x##size##_impl_avx512dq = { \ + .mul = v##sign##int##bits##x##size##_avx512dq_mul, \ + }; + +#define VEC_AVX512DQ_DEFINE_OPERATIONS(bits, size) \ + VEC_AVX512DQ_DEFINE_OPERATIONS_SIGN(u, bits, size) \ + VEC_AVX512DQ_DEFINE_OPERATIONS_SIGN( , bits, size) + +VEC_AVX512DQ_DEFINE_OPERATIONS(64, 8)