Mercurial > vec
changeset 20:627d548b23c8
impl/generic: fix load and store implementations
this caused a segmentation fault under AltiVec, but it went under
the radar on x86 because my main PC supports all of the non-generic
vector implementations.
| author | Paper <paper@tflc.us> |
|---|---|
| date | Thu, 21 Nov 2024 21:19:11 +0000 |
| parents | cf04071d2148 |
| children | 697b9ba1c1de |
| files | include/vec/impl/cpu.h include/vec/impl/generic.h include/vec/impl/ppc/altivec.h test/test_compare.h |
| diffstat | 4 files changed, 28 insertions(+), 8 deletions(-) [+] |
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--- a/include/vec/impl/cpu.h Wed Nov 20 14:33:19 2024 -0500 +++ b/include/vec/impl/cpu.h Thu Nov 21 21:19:11 2024 +0000 @@ -311,8 +311,8 @@ void (*handler)(int sig); handler = signal(SIGILL, vec_CPU_illegal_instruction); if (!setjmp(vec_jmpbuf)) { - asm volatile("mtspr 256, %0\n\t" - "vand %%v0, %%v0, %%v0" ::"r"(-1)); + vector unsigned char vec; + vec_and(vec, vec); altivec = 1; } signal(SIGILL, handler); @@ -324,13 +324,14 @@ { volatile int vsx = 0; #if defined(VEC_COMPILER_HAS_ALTIVEC_VSX) && defined(__GNUC__) +# warning Compiling UNTESTED code for VSX. void (*handler)(int sig); handler = signal(SIGILL, vec_CPU_illegal_instruction); if (!setjmp(vec_jmpbuf)) { // this is completely untested - asm volatile("mtspr 256, %0\n\t" - "xxland %%v0, %%v0, %%v0" ::"r"(-1)); - vsx = 1; + //__asm__ __volatile__("mtspr 256, %0\n\t" + // "xxland %%v0, %%v0, %%v0" ::"r"(-1)); + //vsx = 1; } signal(SIGILL, handler); #endif
--- a/include/vec/impl/generic.h Wed Nov 20 14:33:19 2024 -0500 +++ b/include/vec/impl/generic.h Thu Nov 21 21:19:11 2024 +0000 @@ -78,18 +78,32 @@ return vec; \ } \ \ + static v##sign##int##bits##x##size v##sign##int##bits##x##size##_generic_load(const vec_##sign##int##bits in[size]) \ + { \ + v##sign##int##bits##x##size vec; \ + vec.generic[0] = v##sign##int##bits##x##halfsize##_load(in); \ + vec.generic[1] = v##sign##int##bits##x##halfsize##_load(in + halfsize); \ + return vec; \ + } \ + \ static void v##sign##int##bits##x##size##_generic_store_aligned(v##sign##int##bits##x##size vec, vec_##sign##int##bits out[size]) \ { \ v##sign##int##bits##x##halfsize##_store_aligned(vec.generic[0], out); \ v##sign##int##bits##x##halfsize##_store_aligned(vec.generic[1], out + halfsize); \ } \ \ + static void v##sign##int##bits##x##size##_generic_store(v##sign##int##bits##x##size vec, vec_##sign##int##bits out[size]) \ + { \ + v##sign##int##bits##x##halfsize##_store(vec.generic[0], out); \ + v##sign##int##bits##x##halfsize##_store(vec.generic[1], out + halfsize); \ + } \ + \ static v##sign##int##bits##x##size##_impl v##sign##int##bits##x##size##_impl_generic = { \ /* .splat = */ NULL, \ v##sign##int##bits##x##size##_generic_load_aligned, \ - v##sign##int##bits##x##size##_generic_load_aligned, \ + v##sign##int##bits##x##size##_generic_load, \ v##sign##int##bits##x##size##_generic_store_aligned, \ - v##sign##int##bits##x##size##_generic_store_aligned, \ + v##sign##int##bits##x##size##_generic_store, \ }; #define VEC_GENERIC_DEFINE_OPERATIONS(bits, size, halfsize) \
--- a/include/vec/impl/ppc/altivec.h Wed Nov 20 14:33:19 2024 -0500 +++ b/include/vec/impl/ppc/altivec.h Thu Nov 21 21:19:11 2024 +0000 @@ -178,6 +178,11 @@ v##sign##int##bits##x##size##_altivec_lshift, \ v##sign##int##bits##x##size##_altivec_rshift, \ VEC_ALTIVEC_STRUCT_##sign##LRSHIFT(sign, csign, bits, size), \ + /* .cmplt = */ NULL, \ + /* .cmple = */ NULL, \ + /* .cmpeq = */ NULL, \ + /* .cmpgt = */ NULL, \ + /* .cmpge = */ NULL, \ }; #define VEC_DEFINE_OPERATIONS(bits, size) \