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annotate src/impl/x86/avx512dq.c @ 28:c6c99ab1088a

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*: add min/max functions and a big big refactor (again) agh, this time I added a few more implementations (and generally made the code just a little faster...)
author Paper <paper@tflc.us>
date Thu, 24 Apr 2025 00:54:02 -0400
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c6c99ab1088a *: add min/max functions and a big big refactor (again)
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1 /**
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2 * vec - a tiny SIMD vector library in C99
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3 *
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4 * Copyright (c) 2024 Paper
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5 *
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6 * Permission is hereby granted, free of charge, to any person obtaining a copy
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7 * of this software and associated documentation files (the "Software"), to deal
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8 * in the Software without restriction, including without limitation the rights
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9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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10 * copies of the Software, and to permit persons to whom the Software is
c6c99ab1088a *: add min/max functions and a big big refactor (again)
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11 * furnished to do so, subject to the following conditions:
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12 *
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13 * The above copyright notice and this permission notice shall be included in all
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14 * copies or substantial portions of the Software.
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15 *
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16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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19 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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22 * SOFTWARE.
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23 **/
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24
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25 #include "vec/impl/x86/avx512dq.h"
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27 #include <immintrin.h>
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29 /* ------------------------------------------------------------------------ */
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31 #define VEC_AVX512DQ_DEFINE_OPERATIONS_SIGN(sign, bits, size) \
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32 union v##sign##int##bits##x##size##_impl_data { \
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33 v##sign##int##bits##x##size vec; \
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34 __m512i avx512dq; \
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35 }; \
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36 \
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37 VEC_STATIC_ASSERT(VEC_ALIGNOF(__m512i) <= VEC_ALIGNOF(v##sign##int##bits##x##size), "vec: v" #sign "int" #bits "x" #size " alignment needs to be expanded to fit intrinsic type size"); \
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38 VEC_STATIC_ASSERT(sizeof(__m512i) <= sizeof(v##sign##int##bits##x##size), "vec: v" #sign "int" #bits "x" #size " needs to be expanded to fit intrinsic type size"); \
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39 \
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40 VEC_FUNC_IMPL v##sign##int##bits##x##size v##sign##int##bits##x##size##_avx512dq_mul(v##sign##int##bits##x##size vec1, v##sign##int##bits##x##size vec2) \
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41 { \
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42 union v##sign##int##bits##x##size##_impl_data *vec1d = (union v##sign##int##bits##x##size##_impl_data *)&vec1; \
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43 union v##sign##int##bits##x##size##_impl_data *vec2d = (union v##sign##int##bits##x##size##_impl_data *)&vec2; \
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44 \
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45 vec1d->avx512dq = _mm512_mullo_epi64(vec1d->avx512dq, vec2d->avx512dq); \
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46 return vec1d->vec; \
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47 } \
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48 \
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49 const v##sign##int##bits##x##size##_impl v##sign##int##bits##x##size##_impl_avx512dq = { \
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50 .mul = v##sign##int##bits##x##size##_avx512dq_mul, \
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51 };
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52
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53 #define VEC_AVX512DQ_DEFINE_OPERATIONS(bits, size) \
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54 VEC_AVX512DQ_DEFINE_OPERATIONS_SIGN(u, bits, size) \
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55 VEC_AVX512DQ_DEFINE_OPERATIONS_SIGN( , bits, size)
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56
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57 VEC_AVX512DQ_DEFINE_OPERATIONS(64, 8)